Search

Cara E. Rakowski

Examiner (ID: 4307)

Most Active Art Unit
2872
Art Unit(s)
2872
Total Applications
623
Issued Applications
371
Pending Applications
77
Abandoned Applications
189

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9571897 [patent_doc_number] => 20140189611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'Method Of Decomposable Checking Approach For Mask Alignment In Multiple Patterning' [patent_app_type] => utility [patent_app_number] => 13/732855 [patent_app_country] => US [patent_app_date] => 2013-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6534 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13732855 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/732855
Method of decomposable checking approach for mask alignment in multiple patterning Jan 1, 2013 Issued
Array ( [id] => 9961421 [patent_doc_number] => 09009646 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-04-14 [patent_title] => 'Finding I/O placement with a router' [patent_app_type] => utility [patent_app_number] => 13/731865 [patent_app_country] => US [patent_app_date] => 2012-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7600 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13731865 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/731865
Finding I/O placement with a router Dec 30, 2012 Issued
Array ( [id] => 10847880 [patent_doc_number] => 08875082 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-10-28 [patent_title] => 'System and method for detecting and prescribing physical corrections for timing violations in pruned timing data for electronic circuit design defined by physical implementation data' [patent_app_type] => utility [patent_app_number] => 13/729665 [patent_app_country] => US [patent_app_date] => 2012-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 25 [patent_no_of_words] => 16736 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13729665 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/729665
System and method for detecting and prescribing physical corrections for timing violations in pruned timing data for electronic circuit design defined by physical implementation data Dec 27, 2012 Issued
Array ( [id] => 11724136 [patent_doc_number] => 09696991 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-07-04 [patent_title] => 'Fixed-point and floating-point optimization' [patent_app_type] => utility [patent_app_number] => 13/727835 [patent_app_country] => US [patent_app_date] => 2012-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6585 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13727835 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/727835
Fixed-point and floating-point optimization Dec 26, 2012 Issued
Array ( [id] => 9571910 [patent_doc_number] => 20140189623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'PARASITIC COMPONENT LIBRARY AND METHOD FOR EFFICIENT CIRCUIT DESIGN AND SIMULATION USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/728295 [patent_app_country] => US [patent_app_date] => 2012-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4888 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13728295 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/728295
Parasitic component library and method for efficient circuit design and simulation using the same Dec 26, 2012 Issued
Array ( [id] => 9563889 [patent_doc_number] => 20140181602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'MODELING MEMORY ARRAYS FOR TEST PATTERN ANALYSIS' [patent_app_type] => utility [patent_app_number] => 13/725185 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3627 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13725185 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/725185
MODELING MEMORY ARRAYS FOR TEST PATTERN ANALYSIS Dec 20, 2012 Abandoned
Array ( [id] => 8918223 [patent_doc_number] => 20130179847 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'Source Mask Optimization to Reduce Stochastic Effects' [patent_app_type] => utility [patent_app_number] => 13/719135 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 16464 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13719135 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/719135
Source mask optimization to reduce stochastic effects Dec 17, 2012 Issued
Array ( [id] => 9548898 [patent_doc_number] => 20140173546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'Method and system to view and analyze state model transition on host/semiconductor equipment for 300mm standards' [patent_app_type] => utility [patent_app_number] => 13/716235 [patent_app_country] => US [patent_app_date] => 2012-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3010 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13716235 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/716235
Method and system to view and analyze state model transition on host/semiconductor equipment for 300mm standards Dec 16, 2012 Abandoned
Array ( [id] => 10550552 [patent_doc_number] => 09275178 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-03-01 [patent_title] => 'Method and apparatus for considering paths influenced by different power supply domains in timing analysis' [patent_app_type] => utility [patent_app_number] => 13/715259 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 11317 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715259 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/715259
Method and apparatus for considering paths influenced by different power supply domains in timing analysis Dec 13, 2012 Issued
Array ( [id] => 9520720 [patent_doc_number] => 20140157212 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'Distinguishable IC Patterns with Encoded Information' [patent_app_type] => utility [patent_app_number] => 13/692845 [patent_app_country] => US [patent_app_date] => 2012-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7527 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13692845 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/692845
Distinguishable IC patterns with encoded information Dec 2, 2012 Issued
Array ( [id] => 8694791 [patent_doc_number] => 20130056799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-07 [patent_title] => 'CIRCUIT SIMULATION METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT' [patent_app_type] => utility [patent_app_number] => 13/667749 [patent_app_country] => US [patent_app_date] => 2012-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 11201 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13667749 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/667749
CIRCUIT SIMULATION METHOD AND SEMICONDUCTOR INTEGRATED CIRCUIT Nov 1, 2012 Abandoned
Array ( [id] => 9316883 [patent_doc_number] => 20140049221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-20 [patent_title] => 'IN-VEHICLE ELECTRONIC SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/004698 [patent_app_country] => US [patent_app_date] => 2012-10-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3002 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14004698 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/004698
IN-VEHICLE ELECTRONIC SYSTEM Oct 11, 2012 Abandoned
Array ( [id] => 9418784 [patent_doc_number] => 20140103434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-17 [patent_title] => 'MULTI-FINGER TRANSISTOR LAYOUT FOR REDUCING CROSS-FINGER ELECTRIC VARIATIONS AND FOR FULLY UTILIZING AVAILABLE BREAKDOWN VOLTAGES' [patent_app_type] => utility [patent_app_number] => 13/649769 [patent_app_country] => US [patent_app_date] => 2012-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 12943 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13649769 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/649769
Multi-finger transistor layout for reducing cross-finger electric variations and for fully utilizing available breakdown voltages Oct 10, 2012 Issued
Array ( [id] => 9730340 [patent_doc_number] => 20140266047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'SYSTEM AND METHOD FOR REMOTE MONITORING OF CHARGING THE BATTERY OF AN ELECTRIC VEHICLE, CHARGER AND DEVICE FOR USE IN THE SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 14/350924 [patent_app_country] => US [patent_app_date] => 2012-10-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2663 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14350924 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/350924
SYSTEM AND METHOD FOR REMOTE MONITORING OF CHARGING THE BATTERY OF AN ELECTRIC VEHICLE, CHARGER AND DEVICE FOR USE IN THE SYSTEM AND METHOD Oct 7, 2012 Abandoned
Array ( [id] => 9683137 [patent_doc_number] => 20140239900 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-28 [patent_title] => 'LEAD STORAGE BATTERY SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/351158 [patent_app_country] => US [patent_app_date] => 2012-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7021 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14351158 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/351158
Lead storage battery system Sep 30, 2012 Issued
Array ( [id] => 9316551 [patent_doc_number] => 20140048889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-20 [patent_title] => 'Layout Circuit Optimization For Deep Submicron Technologies' [patent_app_type] => utility [patent_app_number] => 13/628839 [patent_app_country] => US [patent_app_date] => 2012-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5510 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13628839 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/628839
Layout Circuit Optimization For Deep Submicron Technologies Sep 26, 2012 Abandoned
Array ( [id] => 12295431 [patent_doc_number] => 09935498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-04-03 [patent_title] => Communication efficiency with an implantable medical device using a circulator and a backscatter signal [patent_app_type] => utility [patent_app_number] => 13/625922 [patent_app_country] => US [patent_app_date] => 2012-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11999 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13625922 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/625922
Communication efficiency with an implantable medical device using a circulator and a backscatter signal Sep 24, 2012 Issued
Array ( [id] => 8730734 [patent_doc_number] => 20130076303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-28 [patent_title] => 'BATTERY CHARGE CONTROL SYSTEM AND METHOD' [patent_app_type] => utility [patent_app_number] => 13/625860 [patent_app_country] => US [patent_app_date] => 2012-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3197 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13625860 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/625860
BATTERY CHARGE CONTROL SYSTEM AND METHOD Sep 23, 2012 Abandoned
Array ( [id] => 8718370 [patent_doc_number] => 20130069586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-21 [patent_title] => 'WIRELESS POWER TRANSMITTING APPARATUS AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/624116 [patent_app_country] => US [patent_app_date] => 2012-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 12166 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13624116 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/624116
Wireless power transmitting apparatus and method thereof Sep 20, 2012 Issued
Array ( [id] => 8718374 [patent_doc_number] => 20130069591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-21 [patent_title] => 'BATTERY CHARGING APPARATUS FOR VEHICLE' [patent_app_type] => utility [patent_app_number] => 13/624049 [patent_app_country] => US [patent_app_date] => 2012-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 12457 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13624049 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/624049
Battery charging apparatus for vehicle Sep 20, 2012 Issued
Menu