Search

Carl J. Arbes

Examiner (ID: 227, Phone: (571)272-4563 , Office: P/3729 )

Most Active Art Unit
3729
Art Unit(s)
3206, 3726, 3202, 3201, 2103, 3727, 3729, 2899, 2831
Total Applications
4677
Issued Applications
4192
Pending Applications
65
Abandoned Applications
435

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8160074 [patent_doc_number] => 08171621 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-08 [patent_title] => 'Methods of fabrication of a simulation lead' [patent_app_type] => utility [patent_app_number] => 12/895466 [patent_app_country] => US [patent_app_date] => 2010-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 5693 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/171/08171621.pdf [firstpage_image] =>[orig_patent_app_number] => 12895466 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/895466
Methods of fabrication of a simulation lead Sep 29, 2010 Issued
Array ( [id] => 6119023 [patent_doc_number] => 20110083323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'Method For Fabricating An Interlayer Conducting Structure Of An Embedded Circuitry' [patent_app_type] => utility [patent_app_number] => 12/895824 [patent_app_country] => US [patent_app_date] => 2010-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1282 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20110083323.pdf [firstpage_image] =>[orig_patent_app_number] => 12895824 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/895824
Method for fabricating an interlayer conducting structure of an embedded circuitry Sep 29, 2010 Issued
Array ( [id] => 6112092 [patent_doc_number] => 20110072870 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'STANDARDIZED TOOL ASSEMBLY FOR UNIVERSAL ORGANIZER' [patent_app_type] => utility [patent_app_number] => 12/891796 [patent_app_country] => US [patent_app_date] => 2010-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5920 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20110072870.pdf [firstpage_image] =>[orig_patent_app_number] => 12891796 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/891796
Method of manufacturing a pocket tool Sep 26, 2010 Issued
Array ( [id] => 8196614 [patent_doc_number] => 08186043 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-05-29 [patent_title] => 'Method of manufacturing a circuit board' [patent_app_type] => utility [patent_app_number] => 12/891176 [patent_app_country] => US [patent_app_date] => 2010-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 31 [patent_no_of_words] => 5705 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/186/08186043.pdf [firstpage_image] =>[orig_patent_app_number] => 12891176 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/891176
Method of manufacturing a circuit board Sep 26, 2010 Issued
Array ( [id] => 5945597 [patent_doc_number] => 20110030329 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'Microwires, methods for their production, and products made using them' [patent_app_type] => utility [patent_app_number] => 12/924384 [patent_app_country] => US [patent_app_date] => 2010-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11031 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20110030329.pdf [firstpage_image] =>[orig_patent_app_number] => 12924384 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/924384
Method for making an insulated microwire Sep 26, 2010 Issued
Array ( [id] => 8946284 [patent_doc_number] => 20130192064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-01 [patent_title] => 'METHOD FOR MANUFACTURING PACKAGED LIGHT EMITTING DIODE' [patent_app_type] => utility [patent_app_number] => 13/824894 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1204 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13824894 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/824894
Method for manufacturing packaged light emitting diode Sep 20, 2010 Issued
Array ( [id] => 8286072 [patent_doc_number] => 20120174395 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-12 [patent_title] => 'METHOD FOR CONNECTING OPTICAL FIBERS' [patent_app_type] => utility [patent_app_number] => 13/497215 [patent_app_country] => US [patent_app_date] => 2010-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4019 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13497215 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/497215
Method for connecting optical fibers Sep 16, 2010 Issued
Array ( [id] => 6119024 [patent_doc_number] => 20110083324 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-14 [patent_title] => 'SEALED CRIMP CONNECTION METHODS' [patent_app_type] => utility [patent_app_number] => 12/883838 [patent_app_country] => US [patent_app_date] => 2010-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5153 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0083/20110083324.pdf [firstpage_image] =>[orig_patent_app_number] => 12883838 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/883838
Sealed crimp connection methods Sep 15, 2010 Issued
Array ( [id] => 6111517 [patent_doc_number] => 20110072654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'Electronic Component Mounting Apparatus, Component Supply Apparatus, and Electronic Component Mounting Method' [patent_app_type] => utility [patent_app_number] => 12/881719 [patent_app_country] => US [patent_app_date] => 2010-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4716 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20110072654.pdf [firstpage_image] =>[orig_patent_app_number] => 12881719 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/881719
Electronic component mounting apparatus Sep 13, 2010 Issued
Array ( [id] => 7813719 [patent_doc_number] => 20120060339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-15 [patent_title] => 'DISASSEMBLING AND RECYCLING A BATTERY' [patent_app_type] => utility [patent_app_number] => 13/000421 [patent_app_country] => US [patent_app_date] => 2010-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5720 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0060/20120060339.pdf [firstpage_image] =>[orig_patent_app_number] => 13000421 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/000421
Disassembling and recycling a battery Sep 13, 2010 Issued
Array ( [id] => 7715967 [patent_doc_number] => 20120006478 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-12 [patent_title] => 'FABRICATING METHOD OF CIRCUIT BOARD' [patent_app_type] => utility [patent_app_number] => 12/878586 [patent_app_country] => US [patent_app_date] => 2010-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3002 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0006/20120006478.pdf [firstpage_image] =>[orig_patent_app_number] => 12878586 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/878586
Fabricating method of circuit board Sep 8, 2010 Issued
Array ( [id] => 8261123 [patent_doc_number] => 20120160555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-28 [patent_title] => 'METHOD FOR CONNECTING A PLURALITY OF ELEMENTS OF A CIRCUIT BOARD, CIRCUIT BOARD, AND USE OF SUCH A METHOD' [patent_app_type] => utility [patent_app_number] => 13/393697 [patent_app_country] => US [patent_app_date] => 2010-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6579 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13393697 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/393697
Method for connecting a plurality of elements of a circuit board Aug 31, 2010 Issued
Array ( [id] => 9151456 [patent_doc_number] => 08584352 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'Process for producing multilayer printed wiring board' [patent_app_type] => utility [patent_app_number] => 12/869926 [patent_app_country] => US [patent_app_date] => 2010-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18581 [patent_no_of_claims] => 56 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12869926 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/869926
Process for producing multilayer printed wiring board Aug 26, 2010 Issued
Array ( [id] => 6019738 [patent_doc_number] => 20110048786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-03 [patent_title] => 'PRINTED CIRCUIT BOARD HAVING A BUMP AND A METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/870137 [patent_app_country] => US [patent_app_date] => 2010-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6588 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0048/20110048786.pdf [firstpage_image] =>[orig_patent_app_number] => 12870137 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/870137
PRINTED CIRCUIT BOARD HAVING A BUMP AND A METHOD OF MANUFACTURING THE SAME Aug 26, 2010 Abandoned
Array ( [id] => 7994589 [patent_doc_number] => 08079139 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-12-20 [patent_title] => 'Method for producing electro-thermal separation type light emitting diode support structure' [patent_app_type] => utility [patent_app_number] => 12/805976 [patent_app_country] => US [patent_app_date] => 2010-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 5235 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/079/08079139.pdf [firstpage_image] =>[orig_patent_app_number] => 12805976 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/805976
Method for producing electro-thermal separation type light emitting diode support structure Aug 26, 2010 Issued
Array ( [id] => 9151458 [patent_doc_number] => 08584354 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-19 [patent_title] => 'Method for making glass interposer panels' [patent_app_type] => utility [patent_app_number] => 12/868976 [patent_app_country] => US [patent_app_date] => 2010-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 7767 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12868976 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/868976
Method for making glass interposer panels Aug 25, 2010 Issued
Array ( [id] => 6070835 [patent_doc_number] => 20110045686 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-24 [patent_title] => 'SYSTEMS AND METHODS FOR POWER CONNECTION' [patent_app_type] => utility [patent_app_number] => 12/860716 [patent_app_country] => US [patent_app_date] => 2010-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8277 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0045/20110045686.pdf [firstpage_image] =>[orig_patent_app_number] => 12860716 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/860716
System for power connection Aug 19, 2010 Issued
Array ( [id] => 8315816 [patent_doc_number] => 08230587 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-31 [patent_title] => 'Carrier for aligning electronic components with slidably arranged plates' [patent_app_type] => utility [patent_app_number] => 12/859106 [patent_app_country] => US [patent_app_date] => 2010-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 7734 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12859106 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/859106
Carrier for aligning electronic components with slidably arranged plates Aug 17, 2010 Issued
Array ( [id] => 6150275 [patent_doc_number] => 20110154660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-30 [patent_title] => 'CONDUCTIVE PASTE COMPOSITION FOR INNER ELECTRODES AND METHOD OF MANUFACTURING MULTILAYER CERAMIC CAPACITOR USING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/858897 [patent_app_country] => US [patent_app_date] => 2010-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 4010 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0154/20110154660.pdf [firstpage_image] =>[orig_patent_app_number] => 12858897 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/858897
Conductive paste composition for inner electrodes and method of manufacturing multilayer capacitor Aug 17, 2010 Issued
Array ( [id] => 8433718 [patent_doc_number] => 08281483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-10-09 [patent_title] => 'Fixture for aligning an electronic component' [patent_app_type] => utility [patent_app_number] => 12/858394 [patent_app_country] => US [patent_app_date] => 2010-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 13781 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12858394 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/858394
Fixture for aligning an electronic component Aug 16, 2010 Issued
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