
Carl J. Arbes
Examiner (ID: 227, Phone: (571)272-4563 , Office: P/3729 )
| Most Active Art Unit | 3729 |
| Art Unit(s) | 3206, 3726, 3202, 3201, 2103, 3727, 3729, 2899, 2831 |
| Total Applications | 4677 |
| Issued Applications | 4192 |
| Pending Applications | 65 |
| Abandoned Applications | 435 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 1075626
[patent_doc_number] => 07614135
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-11-10
[patent_title] => 'Method for making reservoir-based sensor device'
[patent_app_type] => utility
[patent_app_number] => 11/927156
[patent_app_country] => US
[patent_app_date] => 2007-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 27
[patent_no_of_words] => 12555
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/614/07614135.pdf
[firstpage_image] =>[orig_patent_app_number] => 11927156
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/927156 | Method for making reservoir-based sensor device | Oct 28, 2007 | Issued |
Array
(
[id] => 291090
[patent_doc_number] => 07543377
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2009-06-09
[patent_title] => 'Perimeter matrix ball grid array circuit package with a populated center'
[patent_app_type] => utility
[patent_app_number] => 11/926540
[patent_app_country] => US
[patent_app_date] => 2007-10-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 5
[patent_no_of_words] => 1685
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/543/07543377.pdf
[firstpage_image] =>[orig_patent_app_number] => 11926540
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/926540 | Perimeter matrix ball grid array circuit package with a populated center | Oct 28, 2007 | Issued |
Array
(
[id] => 4533248
[patent_doc_number] => 07958626
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-06-14
[patent_title] => 'Embedded passive component network substrate fabrication method'
[patent_app_type] => utility
[patent_app_number] => 11/924156
[patent_app_country] => US
[patent_app_date] => 2007-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 37
[patent_no_of_words] => 8171
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/958/07958626.pdf
[firstpage_image] =>[orig_patent_app_number] => 11924156
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/924156 | Embedded passive component network substrate fabrication method | Oct 24, 2007 | Issued |
Array
(
[id] => 6495985
[patent_doc_number] => 20100218372
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-02
[patent_title] => 'METHOD OF SOLDERING COMPONENTS ON CIRCUIT BOARDS AND CORRESPONDING CIRCUIT BOARD'
[patent_app_type] => utility
[patent_app_number] => 12/738078
[patent_app_country] => US
[patent_app_date] => 2007-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2159
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0218/20100218372.pdf
[firstpage_image] =>[orig_patent_app_number] => 12738078
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/738078 | METHOD OF SOLDERING COMPONENTS ON CIRCUIT BOARDS AND CORRESPONDING CIRCUIT BOARD | Oct 24, 2007 | Abandoned |
Array
(
[id] => 4767248
[patent_doc_number] => 20080052902
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-06
[patent_title] => 'Printed circuit board and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 11/976617
[patent_app_country] => US
[patent_app_date] => 2007-10-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3222
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0052/20080052902.pdf
[firstpage_image] =>[orig_patent_app_number] => 11976617
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/976617 | Method of manufacturing a circuit board | Oct 24, 2007 | Issued |
Array
(
[id] => 7809785
[patent_doc_number] => 08132313
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-03-13
[patent_title] => 'Method for fabricating a LCD panel'
[patent_app_type] => utility
[patent_app_number] => 11/923574
[patent_app_country] => US
[patent_app_date] => 2007-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5152
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/132/08132313.pdf
[firstpage_image] =>[orig_patent_app_number] => 11923574
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/923574 | Method for fabricating a LCD panel | Oct 23, 2007 | Issued |
Array
(
[id] => 4912512
[patent_doc_number] => 20080093111
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-04-24
[patent_title] => 'MULTILAYER WIRING BOARD AND METHOD OF MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 11/877196
[patent_app_country] => US
[patent_app_date] => 2007-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23255
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0093/20080093111.pdf
[firstpage_image] =>[orig_patent_app_number] => 11877196
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/877196 | MULTILAYER WIRING BOARD AND METHOD OF MANUFACTURING THE SAME | Oct 22, 2007 | Abandoned |
Array
(
[id] => 4561062
[patent_doc_number] => 07832089
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-16
[patent_title] => 'Method for making an insulated microwire'
[patent_app_type] => utility
[patent_app_number] => 11/976196
[patent_app_country] => US
[patent_app_date] => 2007-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 11035
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/832/07832089.pdf
[firstpage_image] =>[orig_patent_app_number] => 11976196
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/976196 | Method for making an insulated microwire | Oct 21, 2007 | Issued |
Array
(
[id] => 4762252
[patent_doc_number] => 20080173461
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-07-24
[patent_title] => 'Method of using grounding system'
[patent_app_type] => utility
[patent_app_number] => 11/975039
[patent_app_country] => US
[patent_app_date] => 2007-10-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3939
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0173/20080173461.pdf
[firstpage_image] =>[orig_patent_app_number] => 11975039
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/975039 | Method of using grounding system | Oct 15, 2007 | Issued |
Array
(
[id] => 5283541
[patent_doc_number] => 20090097215
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-04-16
[patent_title] => 'UV-EPOXY AND ULTRASONIC CASE ASSEMBLY METHODS FOR USB FLASH DRIVE'
[patent_app_type] => utility
[patent_app_number] => 11/870435
[patent_app_country] => US
[patent_app_date] => 2007-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 2049
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0097/20090097215.pdf
[firstpage_image] =>[orig_patent_app_number] => 11870435
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/870435 | UV-EPOXY AND ULTRASONIC CASE ASSEMBLY METHODS FOR USB FLASH DRIVE | Oct 10, 2007 | Abandoned |
Array
(
[id] => 182869
[patent_doc_number] => 07644496
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-01-12
[patent_title] => 'Manufacturing method for imprinting stamper'
[patent_app_type] => utility
[patent_app_number] => 11/907288
[patent_app_country] => US
[patent_app_date] => 2007-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 2292
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/644/07644496.pdf
[firstpage_image] =>[orig_patent_app_number] => 11907288
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/907288 | Manufacturing method for imprinting stamper | Oct 9, 2007 | Issued |
Array
(
[id] => 6329358
[patent_doc_number] => 20100018046
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-01-28
[patent_title] => 'Method for the production of an identification carrier or electronic key for electronically actuated locks'
[patent_app_type] => utility
[patent_app_number] => 12/311677
[patent_app_country] => US
[patent_app_date] => 2007-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1538
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0018/20100018046.pdf
[firstpage_image] =>[orig_patent_app_number] => 12311677
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/311677 | Method for the production of an identification carrier or electronic key for electronically actuated locks | Oct 9, 2007 | Abandoned |
Array
(
[id] => 138520
[patent_doc_number] => 07690103
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-04-06
[patent_title] => 'Method of forming a printed circuit board with improved via design'
[patent_app_type] => utility
[patent_app_number] => 11/868148
[patent_app_country] => US
[patent_app_date] => 2007-10-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 24
[patent_no_of_words] => 10803
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/690/07690103.pdf
[firstpage_image] =>[orig_patent_app_number] => 11868148
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/868148 | Method of forming a printed circuit board with improved via design | Oct 4, 2007 | Issued |
Array
(
[id] => 4861847
[patent_doc_number] => 20080141527
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-06-19
[patent_title] => 'METHOD FOR MANUFACTURING MULTILAYER FLEXIBLE PRINTED CIRCUIT BOARD'
[patent_app_type] => utility
[patent_app_number] => 11/861650
[patent_app_country] => US
[patent_app_date] => 2007-09-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 1505
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0141/20080141527.pdf
[firstpage_image] =>[orig_patent_app_number] => 11861650
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/861650 | METHOD FOR MANUFACTURING MULTILAYER FLEXIBLE PRINTED CIRCUIT BOARD | Sep 25, 2007 | Abandoned |
Array
(
[id] => 4917995
[patent_doc_number] => 20080066304
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-20
[patent_title] => 'Technique for laminating multiple substrates'
[patent_app_type] => utility
[patent_app_number] => 11/902758
[patent_app_country] => US
[patent_app_date] => 2007-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 10122
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0066/20080066304.pdf
[firstpage_image] =>[orig_patent_app_number] => 11902758
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/902758 | Technique for laminating multiple substrates | Sep 24, 2007 | Issued |
Array
(
[id] => 4935789
[patent_doc_number] => 20080073103
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-03-27
[patent_title] => 'Twist-on wire connector with peelable covering'
[patent_app_type] => utility
[patent_app_number] => 11/903897
[patent_app_country] => US
[patent_app_date] => 2007-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4195
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0073/20080073103.pdf
[firstpage_image] =>[orig_patent_app_number] => 11903897
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/903897 | Method of making a twist-on wire connector | Sep 24, 2007 | Issued |
Array
(
[id] => 4540415
[patent_doc_number] => 07836587
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-11-23
[patent_title] => 'Method of repairing a contactor apparatus'
[patent_app_type] => utility
[patent_app_number] => 11/858057
[patent_app_country] => US
[patent_app_date] => 2007-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
[patent_figures_cnt] => 60
[patent_no_of_words] => 20205
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/836/07836587.pdf
[firstpage_image] =>[orig_patent_app_number] => 11858057
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/858057 | Method of repairing a contactor apparatus | Sep 18, 2007 | Issued |
Array
(
[id] => 4929899
[patent_doc_number] => 20080000674
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-01-03
[patent_title] => 'SUBSTRATE-IMPRINTING APPARATUS AND METHODS'
[patent_app_type] => utility
[patent_app_number] => 11/853856
[patent_app_country] => US
[patent_app_date] => 2007-09-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 7232
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0000/20080000674.pdf
[firstpage_image] =>[orig_patent_app_number] => 11853856
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/853856 | Substrate-imprinting methods | Sep 11, 2007 | Issued |
Array
(
[id] => 5318131
[patent_doc_number] => 20090056121
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-05
[patent_title] => 'Method of manufacturing electronic component package'
[patent_app_type] => utility
[patent_app_number] => 11/896709
[patent_app_country] => US
[patent_app_date] => 2007-09-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 12323
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0056/20090056121.pdf
[firstpage_image] =>[orig_patent_app_number] => 11896709
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/896709 | Method of manufacturing electronic component package | Sep 4, 2007 | Issued |
Array
(
[id] => 5164322
[patent_doc_number] => 20070285906
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2007-12-13
[patent_title] => 'VOLTAGE REGULATOR AND METHOD USING SUBSTRATE BOARD WITH INSULATOR LAYER AND CONDUCTIVE TRACES'
[patent_app_type] => utility
[patent_app_number] => 11/842190
[patent_app_country] => US
[patent_app_date] => 2007-08-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 6502
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0285/20070285906.pdf
[firstpage_image] =>[orig_patent_app_number] => 11842190
[rel_patent_id] =>[rel_patent_doc_number] =>) 11/842190 | VOLTAGE REGULATOR AND METHOD USING SUBSTRATE BOARD WITH INSULATOR LAYER AND CONDUCTIVE TRACES | Aug 20, 2007 | Abandoned |