Carl W. Whitehead Jr.

Array ( [id] => 3895966 [patent_doc_number] => 05834811 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Salicide process for FETs' [patent_app_type] => 1 [patent_app_number] => 8/967915 [patent_app_country] => US [patent_app_date] => 1997-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 2273 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/834/05834811.pdf [firstpage_image] =>[orig_patent_app_number] => 967915 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4002954 [patent_doc_number] => 05923080 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-13 [patent_title] => 'Semiconductor apparatus having a leadframe with coated leads' [patent_app_type] => 1 [patent_app_number] => 8/960081 [patent_app_country] => US [patent_app_date] => 1997-10-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1210 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/923/05923080.pdf [firstpage_image] =>[orig_patent_app_number] => 960081 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3952856 [patent_doc_number] => 05998832 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-07 [patent_title] => 'Metal oxide semiconductor device for an electro-static discharge circuit' [patent_app_type] => 1 [patent_app_number] => 8/955872 [patent_app_country] => US [patent_app_date] => 1997-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2843 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/998/05998832.pdf [firstpage_image] =>[orig_patent_app_number] => 955872 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4010251 [patent_doc_number] => 05859471 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Semiconductor device having tab tape lead frame with reinforced outer leads' [patent_app_type] => 1 [patent_app_number] => 8/948029 [patent_app_country] => US [patent_app_date] => 1997-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 27 [patent_no_of_words] => 5460 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/859/05859471.pdf [firstpage_image] =>[orig_patent_app_number] => 948029 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4170813 [patent_doc_number] => RE036907 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Leadframe with power and ground planes' [patent_app_type] => 2 [patent_app_number] => 8/947843 [patent_app_country] => US [patent_app_date] => 1997-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5205 [patent_no_of_claims] => 67 [patent_no_of_ind_claims] => 31 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/RE/036/RE036907.pdf [firstpage_image] =>[orig_patent_app_number] => 947843 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3940651 [patent_doc_number] => 05929515 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Gettering enclosure for a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/941823 [patent_app_country] => US [patent_app_date] => 1997-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 876 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/929/05929515.pdf [firstpage_image] =>[orig_patent_app_number] => 941823 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4054396 [patent_doc_number] => 05869890 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Insulation substrate for a semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/938484 [patent_app_country] => US [patent_app_date] => 1997-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 5862 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/869/05869890.pdf [firstpage_image] =>[orig_patent_app_number] => 938484 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3812352 [patent_doc_number] => 05831310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-03 [patent_title] => 'Semiconductor device for checking quality of a semiconductor region' [patent_app_type] => 1 [patent_app_number] => 8/938561 [patent_app_country] => US [patent_app_date] => 1997-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 6808 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/831/05831310.pdf [firstpage_image] =>[orig_patent_app_number] => 938561 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3990187 [patent_doc_number] => 05910666 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-08 [patent_title] => 'High-voltage metal-oxide semiconductor (MOS) device' [patent_app_type] => 1 [patent_app_number] => 8/928627 [patent_app_country] => US [patent_app_date] => 1997-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2465 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/910/05910666.pdf [firstpage_image] =>[orig_patent_app_number] => 928627 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3980877 [patent_doc_number] => 05917240 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Semiconductor device socket' [patent_app_type] => 1 [patent_app_number] => 8/923254 [patent_app_country] => US [patent_app_date] => 1997-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 7291 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917240.pdf [firstpage_image] =>[orig_patent_app_number] => 923254 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4227754 [patent_doc_number] => 06011300 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-01-04 [patent_title] => 'Semiconductor integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 8/919047 [patent_app_country] => US [patent_app_date] => 1997-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 3661 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/011/06011300.pdf [firstpage_image] =>[orig_patent_app_number] => 919047 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4049174 [patent_doc_number] => 05912487 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-15 [patent_title] => 'Split gate flash EEPROM memory cell structure' [patent_app_type] => 1 [patent_app_number] => 8/912609 [patent_app_country] => US [patent_app_date] => 1997-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3707 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 387 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/912/05912487.pdf [firstpage_image] =>[orig_patent_app_number] => 912609 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4019798 [patent_doc_number] => 05880498 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Semiconductor device having a nitrogen doped polysilicon layer' [patent_app_type] => 1 [patent_app_number] => 8/895587 [patent_app_country] => US [patent_app_date] => 1997-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 80 [patent_no_of_words] => 8570 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880498.pdf [firstpage_image] =>[orig_patent_app_number] => 895587 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4019770 [patent_doc_number] => 05880496 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-09 [patent_title] => 'Semiconductor having self-aligned polysilicon electrode layer' [patent_app_type] => 1 [patent_app_number] => 8/892307 [patent_app_country] => US [patent_app_date] => 1997-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5389 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/880/05880496.pdf [firstpage_image] =>[orig_patent_app_number] => 892307 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3836089 [patent_doc_number] => 05739591 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-14 [patent_title] => 'Semiconductor device with a carrier body on which a substrate with a semiconductor element is fastened by means of a glue layer and on which a pattern of conductor tracks is fastened' [patent_app_type] => 1 [patent_app_number] => 8/889716 [patent_app_country] => US [patent_app_date] => 1997-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 7 [patent_no_of_words] => 3601 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/739/05739591.pdf [firstpage_image] =>[orig_patent_app_number] => 889716 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3875153 [patent_doc_number] => 05747363 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-05 [patent_title] => 'Method of manufacturing an integrated electro-optical package' [patent_app_type] => 1 [patent_app_number] => 8/889724 [patent_app_country] => US [patent_app_date] => 1997-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3254 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/747/05747363.pdf [firstpage_image] =>[orig_patent_app_number] => 889724 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3933190 [patent_doc_number] => 05877538 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-02 [patent_title] => 'Bidirectional trench gated power MOSFET with submerged body bus extending underneath gate trench' [patent_app_type] => 1 [patent_app_number] => 8/884826 [patent_app_country] => US [patent_app_date] => 1997-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 22 [patent_no_of_words] => 5873 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/877/05877538.pdf [firstpage_image] =>[orig_patent_app_number] => 884826 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4029749 [patent_doc_number] => 05994204 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-30 [patent_title] => 'Silicon-glass bonded wafers' [patent_app_type] => 1 [patent_app_number] => 8/884787 [patent_app_country] => US [patent_app_date] => 1997-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 3689 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/994/05994204.pdf [firstpage_image] =>[orig_patent_app_number] => 884787 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 3895892 [patent_doc_number] => 05834806 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Raised-bitline, contactless, trenched, flash memory cell' [patent_app_type] => 1 [patent_app_number] => 8/873833 [patent_app_country] => US [patent_app_date] => 1997-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 23 [patent_no_of_words] => 4646 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/834/05834806.pdf [firstpage_image] =>[orig_patent_app_number] => 873833 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4031551 [patent_doc_number] => 05903030 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-11 [patent_title] => 'Semiconductor device provided with an ESD protection circuit' [patent_app_type] => 1 [patent_app_number] => 8/871845 [patent_app_country] => US [patent_app_date] => 1997-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 1696 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/903/05903030.pdf [firstpage_image] =>[orig_patent_app_number] => 871845 [rel_patent_id] =>[rel_patent_doc_number] =>)