Search

Carl W. Whitehead Jr.

Examiner (ID: 6801)

Most Active Art Unit
2503
Art Unit(s)
2815, 2503, 2813
Total Applications
662
Issued Applications
472
Pending Applications
16
Abandoned Applications
174

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3940810 [patent_doc_number] => 05929526 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-27 [patent_title] => 'Removal of metal cusp for improved contact fill' [patent_app_type] => 1 [patent_app_number] => 8/870105 [patent_app_country] => US [patent_app_date] => 1997-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 16 [patent_no_of_words] => 5266 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/929/05929526.pdf [firstpage_image] =>[orig_patent_app_number] => 870105 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/870105
Removal of metal cusp for improved contact fill Jun 4, 1997 Issued
Array ( [id] => 3869789 [patent_doc_number] => 05763298 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-09 [patent_title] => 'Bond pad option for integrated circuits' [patent_app_type] => 1 [patent_app_number] => 8/868179 [patent_app_country] => US [patent_app_date] => 1997-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2692 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/763/05763298.pdf [firstpage_image] =>[orig_patent_app_number] => 868179 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/868179
Bond pad option for integrated circuits Jun 2, 1997 Issued
Array ( [id] => 3845023 [patent_doc_number] => 05847430 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-08 [patent_title] => 'Input protection circuit for semiconductor device' [patent_app_type] => 1 [patent_app_number] => 8/865264 [patent_app_country] => US [patent_app_date] => 1997-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 41 [patent_no_of_words] => 15761 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/847/05847430.pdf [firstpage_image] =>[orig_patent_app_number] => 865264 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/865264
Input protection circuit for semiconductor device May 28, 1997 Issued
Array ( [id] => 3880148 [patent_doc_number] => 05825071 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-20 [patent_title] => 'Photosensitive element having two regions with superior frequency characteristics and conversion characteristics respectively' [patent_app_type] => 1 [patent_app_number] => 8/863587 [patent_app_country] => US [patent_app_date] => 1997-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 18 [patent_no_of_words] => 7476 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/825/05825071.pdf [firstpage_image] =>[orig_patent_app_number] => 863587 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/863587
Photosensitive element having two regions with superior frequency characteristics and conversion characteristics respectively May 26, 1997 Issued
Array ( [id] => 3999447 [patent_doc_number] => 05920124 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-06 [patent_title] => 'Semiconductor device having misalignment resistive interconnect layers' [patent_app_type] => 1 [patent_app_number] => 8/862255 [patent_app_country] => US [patent_app_date] => 1997-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 63 [patent_no_of_words] => 8539 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/920/05920124.pdf [firstpage_image] =>[orig_patent_app_number] => 862255 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/862255
Semiconductor device having misalignment resistive interconnect layers May 22, 1997 Issued
Array ( [id] => 4030406 [patent_doc_number] => 05883397 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Plastic functional element' [patent_app_type] => 1 [patent_app_number] => 8/862741 [patent_app_country] => US [patent_app_date] => 1997-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 9510 [patent_no_of_claims] => 110 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/883/05883397.pdf [firstpage_image] =>[orig_patent_app_number] => 862741 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/862741
Plastic functional element May 22, 1997 Issued
Array ( [id] => 3954095 [patent_doc_number] => 05977614 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-11-02 [patent_title] => 'Lead on chip type semiconductor integrated circuit device to avoid bonding wire short' [patent_app_type] => 1 [patent_app_number] => 8/858891 [patent_app_country] => US [patent_app_date] => 1997-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5187 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/977/05977614.pdf [firstpage_image] =>[orig_patent_app_number] => 858891 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/858891
Lead on chip type semiconductor integrated circuit device to avoid bonding wire short May 18, 1997 Issued
Array ( [id] => 3964478 [patent_doc_number] => 05900657 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-04 [patent_title] => 'MOS switch that reduces clock feed through in a switched capacitor circuit' [patent_app_type] => 1 [patent_app_number] => 8/858670 [patent_app_country] => US [patent_app_date] => 1997-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 4074 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/900/05900657.pdf [firstpage_image] =>[orig_patent_app_number] => 858670 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/858670
MOS switch that reduces clock feed through in a switched capacitor circuit May 18, 1997 Issued
Array ( [id] => 3980405 [patent_doc_number] => 05905282 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-05-18 [patent_title] => 'Multi-terminal surge protection device' [patent_app_type] => 1 [patent_app_number] => 8/856997 [patent_app_country] => US [patent_app_date] => 1997-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 16 [patent_no_of_words] => 14727 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 303 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/905/05905282.pdf [firstpage_image] =>[orig_patent_app_number] => 856997 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/856997
Multi-terminal surge protection device May 14, 1997 Issued
Array ( [id] => 3776070 [patent_doc_number] => 05773874 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-30 [patent_title] => 'Semiconductor device having a mesa structure for surface voltage breakdown' [patent_app_type] => 1 [patent_app_number] => 8/854475 [patent_app_country] => US [patent_app_date] => 1997-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 7278 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/773/05773874.pdf [firstpage_image] =>[orig_patent_app_number] => 854475 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/854475
Semiconductor device having a mesa structure for surface voltage breakdown May 11, 1997 Issued
Array ( [id] => 4054630 [patent_doc_number] => 05869906 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-02-09 [patent_title] => 'Registration accuracy measurement mark for semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/851471 [patent_app_country] => US [patent_app_date] => 1997-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 26 [patent_no_of_words] => 6880 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/869/05869906.pdf [firstpage_image] =>[orig_patent_app_number] => 851471 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/851471
Registration accuracy measurement mark for semiconductor devices May 4, 1997 Issued
Array ( [id] => 3748477 [patent_doc_number] => 05801448 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Conductive lines on the back side of wafers and dice for semiconductor interconnects' [patent_app_type] => 1 [patent_app_number] => 8/846954 [patent_app_country] => US [patent_app_date] => 1997-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3936 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/801/05801448.pdf [firstpage_image] =>[orig_patent_app_number] => 846954 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/846954
Conductive lines on the back side of wafers and dice for semiconductor interconnects Apr 29, 1997 Issued
Array ( [id] => 3904176 [patent_doc_number] => 05751068 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-12 [patent_title] => 'Tape with solder forms for semiconductor devices' [patent_app_type] => 1 [patent_app_number] => 8/847320 [patent_app_country] => US [patent_app_date] => 1997-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 26 [patent_no_of_words] => 4021 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/751/05751068.pdf [firstpage_image] =>[orig_patent_app_number] => 847320 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/847320
Tape with solder forms for semiconductor devices Apr 22, 1997 Issued
Array ( [id] => 4038634 [patent_doc_number] => 05942785 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Poly plug to reduce buried contact series resistance' [patent_app_type] => 1 [patent_app_number] => 8/837487 [patent_app_country] => US [patent_app_date] => 1997-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 1925 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/942/05942785.pdf [firstpage_image] =>[orig_patent_app_number] => 837487 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/837487
Poly plug to reduce buried contact series resistance Apr 17, 1997 Issued
Array ( [id] => 3980323 [patent_doc_number] => 05917204 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Insulated gate bipolar transistor with reduced electric fields' [patent_app_type] => 1 [patent_app_number] => 8/829035 [patent_app_country] => US [patent_app_date] => 1997-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 11 [patent_no_of_words] => 5274 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 277 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917204.pdf [firstpage_image] =>[orig_patent_app_number] => 829035 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/829035
Insulated gate bipolar transistor with reduced electric fields Mar 30, 1997 Issued
Array ( [id] => 4026985 [patent_doc_number] => 05925910 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-07-20 [patent_title] => 'DMOS transistors with schottky diode body structure' [patent_app_type] => 1 [patent_app_number] => 8/825139 [patent_app_country] => US [patent_app_date] => 1997-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 5825 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/925/05925910.pdf [firstpage_image] =>[orig_patent_app_number] => 825139 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/825139
DMOS transistors with schottky diode body structure Mar 27, 1997 Issued
Array ( [id] => 3794763 [patent_doc_number] => 05841187 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-24 [patent_title] => 'Molded electronic component' [patent_app_type] => 1 [patent_app_number] => 8/827156 [patent_app_country] => US [patent_app_date] => 1997-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 3248 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/841/05841187.pdf [firstpage_image] =>[orig_patent_app_number] => 827156 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/827156
Molded electronic component Mar 26, 1997 Issued
Array ( [id] => 3788520 [patent_doc_number] => 05821596 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'Batch fabricated semiconductor micro-switch' [patent_app_type] => 1 [patent_app_number] => 8/822839 [patent_app_country] => US [patent_app_date] => 1997-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 30 [patent_no_of_words] => 9317 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/821/05821596.pdf [firstpage_image] =>[orig_patent_app_number] => 822839 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/822839
Batch fabricated semiconductor micro-switch Mar 23, 1997 Issued
Array ( [id] => 3989594 [patent_doc_number] => 05959320 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-28 [patent_title] => 'Semiconductor die having on-die de-coupling capacitance' [patent_app_type] => 1 [patent_app_number] => 8/819299 [patent_app_country] => US [patent_app_date] => 1997-03-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2858 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/959/05959320.pdf [firstpage_image] =>[orig_patent_app_number] => 819299 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/819299
Semiconductor die having on-die de-coupling capacitance Mar 17, 1997 Issued
Array ( [id] => 4038900 [patent_doc_number] => 05942803 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-08-24 [patent_title] => 'Methods for forming openings with improved aspect ratios in integrated circuit devices, and related structures' [patent_app_type] => 1 [patent_app_number] => 8/819601 [patent_app_country] => US [patent_app_date] => 1997-03-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 2618 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/942/05942803.pdf [firstpage_image] =>[orig_patent_app_number] => 819601 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/819601
Methods for forming openings with improved aspect ratios in integrated circuit devices, and related structures Mar 16, 1997 Issued
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