
Carl W. Whitehead Jr.
Examiner (ID: 6801)
| Most Active Art Unit | 2503 |
| Art Unit(s) | 2815, 2503, 2813 |
| Total Applications | 662 |
| Issued Applications | 472 |
| Pending Applications | 16 |
| Abandoned Applications | 174 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 4054438
[patent_doc_number] => 05869893
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-09
[patent_title] => 'Semiconductor device having a trapezoidal joint chip'
[patent_app_type] => 1
[patent_app_number] => 8/816195
[patent_app_country] => US
[patent_app_date] => 1997-03-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 2666
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/869/05869893.pdf
[firstpage_image] =>[orig_patent_app_number] => 816195
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/816195 | Semiconductor device having a trapezoidal joint chip | Mar 11, 1997 | Issued |
Array
(
[id] => 4003017
[patent_doc_number] => 05986329
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-11-16
[patent_title] => 'Deposition of super thin PECVD SiO.sub.2 in multiple deposition station system'
[patent_app_type] => 1
[patent_app_number] => 8/813021
[patent_app_country] => US
[patent_app_date] => 1997-03-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 7
[patent_no_of_words] => 1843
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/986/05986329.pdf
[firstpage_image] =>[orig_patent_app_number] => 813021
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/813021 | Deposition of super thin PECVD SiO.sub.2 in multiple deposition station system | Mar 6, 1997 | Issued |
Array
(
[id] => 3929768
[patent_doc_number] => 05945741
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-31
[patent_title] => 'Semiconductor chip housing having a reinforcing plate'
[patent_app_type] => 1
[patent_app_number] => 8/812358
[patent_app_country] => US
[patent_app_date] => 1997-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 20
[patent_no_of_words] => 5246
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/945/05945741.pdf
[firstpage_image] =>[orig_patent_app_number] => 812358
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/812358 | Semiconductor chip housing having a reinforcing plate | Mar 4, 1997 | Issued |
Array
(
[id] => 3797770
[patent_doc_number] => 05726494
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-10
[patent_title] => 'Semiconductor device having a plated heat sink'
[patent_app_type] => 1
[patent_app_number] => 8/806727
[patent_app_country] => US
[patent_app_date] => 1997-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 4194
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/726/05726494.pdf
[firstpage_image] =>[orig_patent_app_number] => 806727
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/806727 | Semiconductor device having a plated heat sink | Feb 26, 1997 | Issued |
Array
(
[id] => 3834958
[patent_doc_number] => 05760477
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-02
[patent_title] => 'Integrated circuit contacts having resistive electromigration characteristics'
[patent_app_type] => 1
[patent_app_number] => 8/806185
[patent_app_country] => US
[patent_app_date] => 1997-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 4452
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/760/05760477.pdf
[firstpage_image] =>[orig_patent_app_number] => 806185
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/806185 | Integrated circuit contacts having resistive electromigration characteristics | Feb 24, 1997 | Issued |
Array
(
[id] => 3767082
[patent_doc_number] => 05844318
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-01
[patent_title] => 'Aluminum film for semiconductive devices'
[patent_app_type] => 1
[patent_app_number] => 8/802405
[patent_app_country] => US
[patent_app_date] => 1997-02-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 6
[patent_no_of_words] => 3554
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 52
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/844/05844318.pdf
[firstpage_image] =>[orig_patent_app_number] => 802405
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/802405 | Aluminum film for semiconductive devices | Feb 17, 1997 | Issued |
Array
(
[id] => 3980377
[patent_doc_number] => 05905280
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-05-18
[patent_title] => 'Capacitor structures, DRAM cell structures, methods of forming capacitors, methods of forming DRAM cells, and integrated circuits incorporating capacitor structures and DRAM cell structures'
[patent_app_type] => 1
[patent_app_number] => 8/798241
[patent_app_country] => US
[patent_app_date] => 1997-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3209
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/905/05905280.pdf
[firstpage_image] =>[orig_patent_app_number] => 798241
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/798241 | Capacitor structures, DRAM cell structures, methods of forming capacitors, methods of forming DRAM cells, and integrated circuits incorporating capacitor structures and DRAM cell structures | Feb 10, 1997 | Issued |
Array
(
[id] => 3891746
[patent_doc_number] => 05714796
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-03
[patent_title] => 'Integrated circuit device fabricated on semiconductor substrate blocking power supply lines from noise'
[patent_app_type] => 1
[patent_app_number] => 8/796213
[patent_app_country] => US
[patent_app_date] => 1997-02-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 4927
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 291
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/714/05714796.pdf
[firstpage_image] =>[orig_patent_app_number] => 796213
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/796213 | Integrated circuit device fabricated on semiconductor substrate blocking power supply lines from noise | Feb 6, 1997 | Issued |
Array
(
[id] => 3788594
[patent_doc_number] => 05821601
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-13
[patent_title] => 'Bipolar semiconductor integrated circuit with a protection circuit'
[patent_app_type] => 1
[patent_app_number] => 8/796547
[patent_app_country] => US
[patent_app_date] => 1997-02-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 12
[patent_no_of_words] => 4293
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/821/05821601.pdf
[firstpage_image] =>[orig_patent_app_number] => 796547
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/796547 | Bipolar semiconductor integrated circuit with a protection circuit | Feb 5, 1997 | Issued |
Array
(
[id] => 3836496
[patent_doc_number] => 05814836
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-29
[patent_title] => 'Semiconductor device requiring fewer masking steps to manufacture'
[patent_app_type] => 1
[patent_app_number] => 8/792377
[patent_app_country] => US
[patent_app_date] => 1997-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 14
[patent_no_of_words] => 2308
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/814/05814836.pdf
[firstpage_image] =>[orig_patent_app_number] => 792377
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/792377 | Semiconductor device requiring fewer masking steps to manufacture | Feb 2, 1997 | Issued |
Array
(
[id] => 4054588
[patent_doc_number] => 05869903
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-02-09
[patent_title] => 'Sealed semiconductor device including opposed substrates and metal wall'
[patent_app_type] => 1
[patent_app_number] => 8/792731
[patent_app_country] => US
[patent_app_date] => 1997-01-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 25
[patent_no_of_words] => 3781
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 137
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/869/05869903.pdf
[firstpage_image] =>[orig_patent_app_number] => 792731
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/792731 | Sealed semiconductor device including opposed substrates and metal wall | Jan 30, 1997 | Issued |
Array
(
[id] => 3815968
[patent_doc_number] => 05811871
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-22
[patent_title] => 'Semiconductor device comprising a bipolar transistor'
[patent_app_type] => 1
[patent_app_number] => 8/788801
[patent_app_country] => US
[patent_app_date] => 1997-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 43
[patent_no_of_words] => 7482
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/811/05811871.pdf
[firstpage_image] =>[orig_patent_app_number] => 788801
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/788801 | Semiconductor device comprising a bipolar transistor | Jan 22, 1997 | Issued |
Array
(
[id] => 3790791
[patent_doc_number] => 05736758
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-07
[patent_title] => 'Post-fabrication repair thin film imager structure'
[patent_app_type] => 1
[patent_app_number] => 8/786813
[patent_app_country] => US
[patent_app_date] => 1997-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 2646
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 208
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/736/05736758.pdf
[firstpage_image] =>[orig_patent_app_number] => 786813
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/786813 | Post-fabrication repair thin film imager structure | Jan 20, 1997 | Issued |
Array
(
[id] => 3782351
[patent_doc_number] => 05818107
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-10-06
[patent_title] => 'Chip stacking by edge metallization'
[patent_app_type] => 1
[patent_app_number] => 8/785187
[patent_app_country] => US
[patent_app_date] => 1997-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 16
[patent_no_of_words] => 8312
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/818/05818107.pdf
[firstpage_image] =>[orig_patent_app_number] => 785187
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/785187 | Chip stacking by edge metallization | Jan 16, 1997 | Issued |
Array
(
[id] => 3702265
[patent_doc_number] => 05677563
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-10-14
[patent_title] => 'Gate stack structure of a field effect transistor'
[patent_app_type] => 1
[patent_app_number] => 8/784720
[patent_app_country] => US
[patent_app_date] => 1997-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 5459
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/677/05677563.pdf
[firstpage_image] =>[orig_patent_app_number] => 784720
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/784720 | Gate stack structure of a field effect transistor | Jan 15, 1997 | Issued |
| 08/784722 | MOLDED ENCAPSULATED ELECTRONIC COMPONENT | Jan 15, 1997 | Abandoned |
Array
(
[id] => 3633270
[patent_doc_number] => 05686753
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-11
[patent_title] => 'Schottky barrier diode having a mesa structure'
[patent_app_type] => 1
[patent_app_number] => 8/777570
[patent_app_country] => US
[patent_app_date] => 1996-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 6
[patent_no_of_words] => 2191
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/686/05686753.pdf
[firstpage_image] =>[orig_patent_app_number] => 777570
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/777570 | Schottky barrier diode having a mesa structure | Dec 30, 1996 | Issued |
Array
(
[id] => 3633298
[patent_doc_number] => 05686755
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-11-11
[patent_title] => 'LDMOS resurf high voltage transistor'
[patent_app_type] => 1
[patent_app_number] => 8/771371
[patent_app_country] => US
[patent_app_date] => 1996-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 7
[patent_no_of_words] => 1508
[patent_no_of_claims] => 4
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/686/05686755.pdf
[firstpage_image] =>[orig_patent_app_number] => 771371
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/771371 | LDMOS resurf high voltage transistor | Dec 15, 1996 | Issued |
Array
(
[id] => 3929559
[patent_doc_number] => 05945726
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1999-08-31
[patent_title] => 'Lateral bipolar transistor'
[patent_app_type] => 1
[patent_app_number] => 8/766659
[patent_app_country] => US
[patent_app_date] => 1996-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/945/05945726.pdf
[firstpage_image] =>[orig_patent_app_number] => 766659
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/766659 | Lateral bipolar transistor | Dec 15, 1996 | Issued |
Array
(
[id] => 3830301
[patent_doc_number] => 05731625
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-24
[patent_title] => 'Bipolar variable resistance device'
[patent_app_type] => 1
[patent_app_number] => 8/766771
[patent_app_country] => US
[patent_app_date] => 1996-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
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[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/731/05731625.pdf
[firstpage_image] =>[orig_patent_app_number] => 766771
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/766771 | Bipolar variable resistance device | Dec 12, 1996 | Issued |