
Carl W. Whitehead Jr.
Examiner (ID: 6801)
| Most Active Art Unit | 2503 |
| Art Unit(s) | 2815, 2503, 2813 |
| Total Applications | 662 |
| Issued Applications | 472 |
| Pending Applications | 16 |
| Abandoned Applications | 174 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 3830123
[patent_doc_number] => 05731611
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-24
[patent_title] => 'MOSFET transistor cell manufactured with selectively implanted punch through prevent and threshold reductoin zones'
[patent_app_type] => 1
[patent_app_number] => 8/593967
[patent_app_country] => US
[patent_app_date] => 1996-01-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 15
[patent_no_of_words] => 4104
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 251
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/731/05731611.pdf
[firstpage_image] =>[orig_patent_app_number] => 593967
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/593967 | MOSFET transistor cell manufactured with selectively implanted punch through prevent and threshold reductoin zones | Jan 29, 1996 | Issued |
Array
(
[id] => 3741139
[patent_doc_number] => 05698897
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-12-16
[patent_title] => 'Semiconductor device having a plated heat sink'
[patent_app_type] => 1
[patent_app_number] => 8/591977
[patent_app_country] => US
[patent_app_date] => 1996-01-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 12
[patent_no_of_words] => 4194
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/698/05698897.pdf
[firstpage_image] =>[orig_patent_app_number] => 591977
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/591977 | Semiconductor device having a plated heat sink | Jan 28, 1996 | Issued |
Array
(
[id] => 3766905
[patent_doc_number] => 05844306
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-01
[patent_title] => 'Die pad structure for solder bonding'
[patent_app_type] => 1
[patent_app_number] => 8/590797
[patent_app_country] => US
[patent_app_date] => 1996-01-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 42
[patent_no_of_words] => 7376
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 9
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/844/05844306.pdf
[firstpage_image] =>[orig_patent_app_number] => 590797
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/590797 | Die pad structure for solder bonding | Jan 23, 1996 | Issued |
Array
(
[id] => 3883286
[patent_doc_number] => 05729034
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-17
[patent_title] => 'Semiconductor DRAM cell having a capacitor'
[patent_app_type] => 1
[patent_app_number] => 8/599469
[patent_app_country] => US
[patent_app_date] => 1996-01-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2448
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/729/05729034.pdf
[firstpage_image] =>[orig_patent_app_number] => 599469
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/599469 | Semiconductor DRAM cell having a capacitor | Jan 22, 1996 | Issued |
| 08/588253 | INSULATION SUBSTRATE FOR A SEMICONDUCTOR DEVICE | Jan 17, 1996 | Abandoned |
Array
(
[id] => 3651637
[patent_doc_number] => 05637902
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-06-10
[patent_title] => 'N-well resistor as a ballast resistor for output MOSFET'
[patent_app_type] => 1
[patent_app_number] => 8/586041
[patent_app_country] => US
[patent_app_date] => 1996-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1581
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/637/05637902.pdf
[firstpage_image] =>[orig_patent_app_number] => 586041
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/586041 | N-well resistor as a ballast resistor for output MOSFET | Jan 15, 1996 | Issued |
Array
(
[id] => 3747914
[patent_doc_number] => 05801411
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-01
[patent_title] => 'Integrated capacitor with reduced voltage/temperature drift'
[patent_app_type] => 1
[patent_app_number] => 8/585059
[patent_app_country] => US
[patent_app_date] => 1996-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 31
[patent_no_of_words] => 6739
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/801/05801411.pdf
[firstpage_image] =>[orig_patent_app_number] => 585059
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/585059 | Integrated capacitor with reduced voltage/temperature drift | Jan 10, 1996 | Issued |
Array
(
[id] => 3747742
[patent_doc_number] => 05801400
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-01
[patent_title] => 'Active matrix device'
[patent_app_type] => 1
[patent_app_number] => 8/585427
[patent_app_country] => US
[patent_app_date] => 1996-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 22
[patent_no_of_words] => 7504
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 121
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/801/05801400.pdf
[firstpage_image] =>[orig_patent_app_number] => 585427
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/585427 | Active matrix device | Jan 10, 1996 | Issued |
Array
(
[id] => 3791007
[patent_doc_number] => 05736775
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-04-07
[patent_title] => 'Semiconductor device having a concentration peak position coinciding with a channel stopper'
[patent_app_type] => 1
[patent_app_number] => 8/585993
[patent_app_country] => US
[patent_app_date] => 1996-01-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 24
[patent_no_of_words] => 6360
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/736/05736775.pdf
[firstpage_image] =>[orig_patent_app_number] => 585993
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/585993 | Semiconductor device having a concentration peak position coinciding with a channel stopper | Jan 10, 1996 | Issued |
Array
(
[id] => 3879495
[patent_doc_number] => 05763949
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-06-09
[patent_title] => 'Surface-mount semiconductor package'
[patent_app_type] => 1
[patent_app_number] => 8/583219
[patent_app_country] => US
[patent_app_date] => 1996-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 8
[patent_no_of_words] => 2857
[patent_no_of_claims] => 34
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/763/05763949.pdf
[firstpage_image] =>[orig_patent_app_number] => 583219
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/583219 | Surface-mount semiconductor package | Jan 3, 1996 | Issued |
Array
(
[id] => 3797304
[patent_doc_number] => 05726461
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-10
[patent_title] => 'Active matrix substrate and switching element'
[patent_app_type] => 1
[patent_app_number] => 8/581965
[patent_app_country] => US
[patent_app_date] => 1996-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 20
[patent_no_of_words] => 8676
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/726/05726461.pdf
[firstpage_image] =>[orig_patent_app_number] => 581965
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/581965 | Active matrix substrate and switching element | Jan 1, 1996 | Issued |
Array
(
[id] => 3606553
[patent_doc_number] => 05578841
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-11-26
[patent_title] => 'Vertical MOSFET device having frontside and backside contacts'
[patent_app_type] => 1
[patent_app_number] => 8/573979
[patent_app_country] => US
[patent_app_date] => 1995-12-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 1
[patent_no_of_words] => 3150
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 130
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/578/05578841.pdf
[firstpage_image] =>[orig_patent_app_number] => 573979
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/573979 | Vertical MOSFET device having frontside and backside contacts | Dec 17, 1995 | Issued |
Array
(
[id] => 3748195
[patent_doc_number] => 05801430
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-09-01
[patent_title] => 'Solid state photodetector with light-responsive rear face'
[patent_app_type] => 1
[patent_app_number] => 8/572935
[patent_app_country] => US
[patent_app_date] => 1995-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 1371
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/801/05801430.pdf
[firstpage_image] =>[orig_patent_app_number] => 572935
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/572935 | Solid state photodetector with light-responsive rear face | Dec 14, 1995 | Issued |
Array
(
[id] => 3883352
[patent_doc_number] => 05729038
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-17
[patent_title] => 'Silicon-glass bonded wafers'
[patent_app_type] => 1
[patent_app_number] => 8/573099
[patent_app_country] => US
[patent_app_date] => 1995-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 21
[patent_no_of_words] => 3688
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/729/05729038.pdf
[firstpage_image] =>[orig_patent_app_number] => 573099
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/573099 | Silicon-glass bonded wafers | Dec 14, 1995 | Issued |
Array
(
[id] => 3895939
[patent_doc_number] => 05834809
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-11-10
[patent_title] => 'MIS transistor semiconductor device'
[patent_app_type] => 1
[patent_app_number] => 8/568537
[patent_app_country] => US
[patent_app_date] => 1995-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 20
[patent_no_of_words] => 2590
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/834/05834809.pdf
[firstpage_image] =>[orig_patent_app_number] => 568537
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/568537 | MIS transistor semiconductor device | Dec 6, 1995 | Issued |
Array
(
[id] => 3638032
[patent_doc_number] => 05631479
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-20
[patent_title] => 'Semiconductor device with laminated refractory metal schottky barrier gate electrode'
[patent_app_type] => 1
[patent_app_number] => 8/567991
[patent_app_country] => US
[patent_app_date] => 1995-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 12
[patent_no_of_words] => 3323
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/631/05631479.pdf
[firstpage_image] =>[orig_patent_app_number] => 567991
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/567991 | Semiconductor device with laminated refractory metal schottky barrier gate electrode | Dec 3, 1995 | Issued |
Array
(
[id] => 3698606
[patent_doc_number] => 05650655
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-07-22
[patent_title] => 'Integrated circuitry having electrical interconnects'
[patent_app_type] => 1
[patent_app_number] => 8/561105
[patent_app_country] => US
[patent_app_date] => 1995-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 25
[patent_no_of_words] => 3549
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/650/05650655.pdf
[firstpage_image] =>[orig_patent_app_number] => 561105
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/561105 | Integrated circuitry having electrical interconnects | Nov 20, 1995 | Issued |
| 08/561245 | LEAD FRAME AND MANUFACTURING METHOD THEREOF | Nov 20, 1995 | Abandoned |
Array
(
[id] => 3660241
[patent_doc_number] => 05623155
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-22
[patent_title] => 'MOSFET on SOI substrate'
[patent_app_type] => 1
[patent_app_number] => 8/559485
[patent_app_country] => US
[patent_app_date] => 1995-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 2
[patent_no_of_words] => 1669
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/623/05623155.pdf
[firstpage_image] =>[orig_patent_app_number] => 559485
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/559485 | MOSFET on SOI substrate | Nov 14, 1995 | Issued |
Array
(
[id] => 3774100
[patent_doc_number] => 05734175
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-03-31
[patent_title] => 'Insulated-gate semiconductor device having a position recognizing pattern directly on the gate contact area'
[patent_app_type] => 1
[patent_app_number] => 8/557463
[patent_app_country] => US
[patent_app_date] => 1995-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 16
[patent_no_of_words] => 3474
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 148
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/734/05734175.pdf
[firstpage_image] =>[orig_patent_app_number] => 557463
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/557463 | Insulated-gate semiconductor device having a position recognizing pattern directly on the gate contact area | Nov 13, 1995 | Issued |