Search

Carla Shamee Mckinney

Examiner (ID: 15579)

Most Active Art Unit
2898
Art Unit(s)
2898
Total Applications
14
Issued Applications
0
Pending Applications
14
Abandoned Applications
0

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17463998 [patent_doc_number] => 20220077304 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-10 [patent_title] => SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/446240 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6210 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 22 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446240 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446240
Semiconductor device and fabrication method thereof Aug 26, 2021 Issued
Array ( [id] => 17871051 [patent_doc_number] => 20220293788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => SEMICONDUCTOR DEVICES HAVING A DIELECTRIC EMBEDDED IN SOURCE AND/OR DRAIN [patent_app_type] => utility [patent_app_number] => 17/458726 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17458726 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/458726
SEMICONDUCTOR DEVICES HAVING A DIELECTRIC EMBEDDED IN SOURCE AND/OR DRAIN Aug 26, 2021 Pending
Array ( [id] => 18228596 [patent_doc_number] => 20230067590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => FIN FIELD-EFFECT TRANSISTOR (FINFET) WITH A HIGH-K MATERIAL FIELD-PLATING [patent_app_type] => utility [patent_app_number] => 17/458122 [patent_app_country] => US [patent_app_date] => 2021-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17458122 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/458122
FIN FIELD-EFFECT TRANSISTOR (FINFET) WITH A HIGH-K MATERIAL FIELD-PLATING Aug 25, 2021 Pending
Array ( [id] => 18221625 [patent_doc_number] => 20230060619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => FIELD EFFECT TRANSISTORS WITH BOTTOM DIELECTRIC ISOLATION [patent_app_type] => utility [patent_app_number] => 17/411597 [patent_app_country] => US [patent_app_date] => 2021-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12036 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17411597 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/411597
FIELD EFFECT TRANSISTORS WITH BOTTOM DIELECTRIC ISOLATION Aug 24, 2021 Pending
Array ( [id] => 18225382 [patent_doc_number] => 20230064376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE HAVING DISLOCATION STRESS MEMORIZATION AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/406395 [patent_app_country] => US [patent_app_date] => 2021-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8379 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17406395 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/406395
SEMICONDUCTOR DEVICE STRUCTURE HAVING DISLOCATION STRESS MEMORIZATION AND METHODS OF FORMING THE SAME Aug 18, 2021 Pending
Array ( [id] => 17263131 [patent_doc_number] => 20210376116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/403867 [patent_app_country] => US [patent_app_date] => 2021-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7907 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17403867 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/403867
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE Aug 15, 2021 Pending
Array ( [id] => 18182939 [patent_doc_number] => 20230043669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => SELF-ALIGNED AIR SPACERS AND METHODS FOR FORMING [patent_app_type] => utility [patent_app_number] => 17/394982 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12463 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17394982 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/394982
SELF-ALIGNED AIR SPACERS AND METHODS FOR FORMING Aug 4, 2021 Pending
Array ( [id] => 18184761 [patent_doc_number] => 20230045491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-09 [patent_title] => SEMICONDUCTOR DEVICE WITH TRIMMED CHANNEL REGION AND METHOD OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 17/395071 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11957 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17395071 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/395071
SEMICONDUCTOR DEVICE WITH TRIMMED CHANNEL REGION AND METHOD OF MAKING THE SAME Aug 4, 2021 Pending
Array ( [id] => 18040394 [patent_doc_number] => 20220384611 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-01 [patent_title] => DIELECTRIC LAYER ON SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/393584 [patent_app_country] => US [patent_app_date] => 2021-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10770 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393584 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/393584
DIELECTRIC LAYER ON SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME Aug 3, 2021 Pending
Array ( [id] => 19314409 [patent_doc_number] => 12040234 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-16 [patent_title] => Semiconductor device and method for fabricating the same [patent_app_type] => utility [patent_app_number] => 17/393387 [patent_app_country] => US [patent_app_date] => 2021-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3174 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17393387 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/393387
Semiconductor device and method for fabricating the same Aug 2, 2021 Issued
Array ( [id] => 17203632 [patent_doc_number] => 20210343727 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => FinFET SRAM Cells With Dielectric Fins [patent_app_type] => utility [patent_app_number] => 17/379104 [patent_app_country] => US [patent_app_date] => 2021-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7731 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17379104 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/379104
FinFET SRAM cells with dielectric fins Jul 18, 2021 Issued
Array ( [id] => 17933233 [patent_doc_number] => 20220328359 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => SEMICONDUCTOR DEVICE AND FORMATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/375384 [patent_app_country] => US [patent_app_date] => 2021-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11409 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17375384 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/375384
SEMICONDUCTOR DEVICE AND FORMATION METHOD THEREOF Jul 13, 2021 Pending
Array ( [id] => 19123538 [patent_doc_number] => 11967532 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Gate spacers and methods of forming the same in semiconductor devices [patent_app_type] => utility [patent_app_number] => 17/370898 [patent_app_country] => US [patent_app_date] => 2021-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 19 [patent_no_of_words] => 6671 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17370898 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/370898
Gate spacers and methods of forming the same in semiconductor devices Jul 7, 2021 Issued
Array ( [id] => 17949607 [patent_doc_number] => 20220336626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => DENSIFIED GATE SPACERS AND FORMATION THEREOF [patent_app_type] => utility [patent_app_number] => 17/369693 [patent_app_country] => US [patent_app_date] => 2021-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17369693 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/369693
DENSIFIED GATE SPACERS AND FORMATION THEREOF Jul 6, 2021 Pending
Array ( [id] => 17900941 [patent_doc_number] => 20220310603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-29 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/366530 [patent_app_country] => US [patent_app_date] => 2021-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21855 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17366530 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/366530
Semiconductor device and manufacturing method thereof Jul 1, 2021 Issued
Array ( [id] => 17583059 [patent_doc_number] => 20220139914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-05 [patent_title] => Semiconductor Device with Gate Isolation Structure and Method for Forming the Same [patent_app_type] => utility [patent_app_number] => 17/364500 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17364500 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/364500
Semiconductor Device with Gate Isolation Structure and Method for Forming the Same Jun 29, 2021 Pending
Array ( [id] => 17174221 [patent_doc_number] => 20210327892 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 17/360349 [patent_app_country] => US [patent_app_date] => 2021-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12847 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17360349 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/360349
Three-dimensional semiconductor memory devices Jun 27, 2021 Issued
Array ( [id] => 19123539 [patent_doc_number] => 11967533 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-23 [patent_title] => Semiconductor devices and methods of manufacturing thereof [patent_app_type] => utility [patent_app_number] => 17/355444 [patent_app_country] => US [patent_app_date] => 2021-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11886 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17355444 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/355444
Semiconductor devices and methods of manufacturing thereof Jun 22, 2021 Issued
Array ( [id] => 18081049 [patent_doc_number] => 20220406661 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/352069 [patent_app_country] => US [patent_app_date] => 2021-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352069 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/352069
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE Jun 17, 2021 Pending
Array ( [id] => 18759879 [patent_doc_number] => 11810919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-11-07 [patent_title] => Semiconductor device structure with conductive via structure and method for forming the same [patent_app_type] => utility [patent_app_number] => 17/350171 [patent_app_country] => US [patent_app_date] => 2021-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 7736 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350171 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/350171
Semiconductor device structure with conductive via structure and method for forming the same Jun 16, 2021 Issued
Menu