Search

Carlos Lugo

Examiner (ID: 6896, Phone: (571)272-7058 , Office: P/3675 )

Most Active Art Unit
3675
Art Unit(s)
3676, 3675, 3674, 3677, 3627, 3673
Total Applications
2136
Issued Applications
1455
Pending Applications
153
Abandoned Applications
552

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10786175 [patent_doc_number] => 20160132332 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-12 [patent_title] => 'SIGNAL PROCESSING DEVICE AND METHOD OF PERFORMING A BIT-EXPAND OPERATION' [patent_app_type] => utility [patent_app_number] => 14/898353 [patent_app_country] => US [patent_app_date] => 2013-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5219 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14898353 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/898353
SIGNAL PROCESSING DEVICE AND METHOD OF PERFORMING A BIT-EXPAND OPERATION Jun 17, 2013 Abandoned
Array ( [id] => 9109875 [patent_doc_number] => 20130283007 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-24 [patent_title] => 'Methods and Apparatus For Attaching Application Specific Functions Within An Array Processor' [patent_app_type] => utility [patent_app_number] => 13/914687 [patent_app_country] => US [patent_app_date] => 2013-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3266 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13914687 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/914687
Methods and Apparatus For Attaching Application Specific Functions Within An Array Processor Jun 10, 2013 Abandoned
Array ( [id] => 10816129 [patent_doc_number] => 20160162290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-09 [patent_title] => 'Processor with Polymorphic Instruction Set Architecture' [patent_app_type] => utility [patent_app_number] => 14/785385 [patent_app_country] => US [patent_app_date] => 2013-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4798 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14785385 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/785385
Processor with Polymorphic Instruction Set Architecture Apr 18, 2013 Abandoned
Array ( [id] => 11482217 [patent_doc_number] => 09588763 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-07 [patent_title] => 'Vector find element not equal instruction' [patent_app_type] => utility [patent_app_number] => 13/783789 [patent_app_country] => US [patent_app_date] => 2013-03-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 13941 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 413 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783789 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783789
Vector find element not equal instruction Mar 3, 2013 Issued
Array ( [id] => 11245271 [patent_doc_number] => 09471312 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-18 [patent_title] => 'Instruction to load data up to a dynamically determined memory boundary' [patent_app_type] => utility [patent_app_number] => 13/783332 [patent_app_country] => US [patent_app_date] => 2013-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 17164 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783332 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783332
Instruction to load data up to a dynamically determined memory boundary Mar 2, 2013 Issued
Array ( [id] => 11830591 [patent_doc_number] => 09727333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-08 [patent_title] => 'Vector find element equal instruction' [patent_app_type] => utility [patent_app_number] => 13/783339 [patent_app_country] => US [patent_app_date] => 2013-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 20582 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 413 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783339 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783339
Vector find element equal instruction Mar 2, 2013 Issued
Array ( [id] => 11752255 [patent_doc_number] => 09710267 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'Instruction to compute the distance to a specified memory boundary' [patent_app_type] => utility [patent_app_number] => 13/783335 [patent_app_country] => US [patent_app_date] => 2013-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 16496 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 239 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783335 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783335
Instruction to compute the distance to a specified memory boundary Mar 2, 2013 Issued
Array ( [id] => 11830591 [patent_doc_number] => 09727333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-08 [patent_title] => 'Vector find element equal instruction' [patent_app_type] => utility [patent_app_number] => 13/783339 [patent_app_country] => US [patent_app_date] => 2013-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 20582 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 413 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783339 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783339
Vector find element equal instruction Mar 2, 2013 Issued
Array ( [id] => 11775070 [patent_doc_number] => 09383996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-05 [patent_title] => 'Instruction to load data up to a specified memory boundary indicated by the instruction' [patent_app_type] => utility [patent_app_number] => 13/783337 [patent_app_country] => US [patent_app_date] => 2013-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 16734 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 279 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783337 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783337
Instruction to load data up to a specified memory boundary indicated by the instruction Mar 2, 2013 Issued
Array ( [id] => 11213687 [patent_doc_number] => 09442722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-13 [patent_title] => 'Vector string range compare' [patent_app_type] => utility [patent_app_number] => 13/783348 [patent_app_country] => US [patent_app_date] => 2013-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 18835 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 412 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783348 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783348
Vector string range compare Mar 2, 2013 Issued
Array ( [id] => 11830591 [patent_doc_number] => 09727333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-08 [patent_title] => 'Vector find element equal instruction' [patent_app_type] => utility [patent_app_number] => 13/783339 [patent_app_country] => US [patent_app_date] => 2013-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 20582 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 413 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783339 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783339
Vector find element equal instruction Mar 2, 2013 Issued
Array ( [id] => 11830591 [patent_doc_number] => 09727333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-08 [patent_title] => 'Vector find element equal instruction' [patent_app_type] => utility [patent_app_number] => 13/783339 [patent_app_country] => US [patent_app_date] => 2013-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 20582 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 413 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13783339 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/783339
Vector find element equal instruction Mar 2, 2013 Issued
Array ( [id] => 9308544 [patent_doc_number] => 20140047218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'MULTI-STAGE REGISTER RENAMING USING DEPENDENCY REMOVAL' [patent_app_type] => utility [patent_app_number] => 13/751145 [patent_app_country] => US [patent_app_date] => 2013-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7786 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13751145 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/751145
MULTI-STAGE REGISTER RENAMING USING DEPENDENCY REMOVAL Jan 27, 2013 Abandoned
Array ( [id] => 9207574 [patent_doc_number] => 20140006751 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-01-02 [patent_title] => 'Source Code Level Multistage Scheduling Approach for Software Development and Testing for Multi-Processor Environments' [patent_app_type] => utility [patent_app_number] => 13/749068 [patent_app_country] => US [patent_app_date] => 2013-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 19679 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13749068 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/749068
Source Code Level Multistage Scheduling Approach for Software Development and Testing for Multi-Processor Environments Jan 23, 2013 Abandoned
Array ( [id] => 9618210 [patent_doc_number] => 20140208067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-24 [patent_title] => 'VECTOR ELEMENT ROTATE AND INSERT UNDER MASK INSTRUCTION' [patent_app_type] => utility [patent_app_number] => 13/748543 [patent_app_country] => US [patent_app_date] => 2013-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 18627 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13748543 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/748543
Vector element rotate and insert under mask instruction Jan 22, 2013 Issued
Array ( [id] => 11700824 [patent_doc_number] => 09690740 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-27 [patent_title] => 'Data processing apparatus, input control apparatus, and control method' [patent_app_type] => utility [patent_app_number] => 13/742092 [patent_app_country] => US [patent_app_date] => 2013-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 8643 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 289 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13742092 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/742092
Data processing apparatus, input control apparatus, and control method Jan 14, 2013 Issued
Array ( [id] => 8816502 [patent_doc_number] => 20130117546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-09 [patent_title] => 'Load Pair Disjoint Facility and Instruction Therefore' [patent_app_type] => utility [patent_app_number] => 13/726746 [patent_app_country] => US [patent_app_date] => 2012-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 22992 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13726746 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/726746
Load pair disjoint facility and instruction therefor Dec 25, 2012 Issued
Array ( [id] => 11752254 [patent_doc_number] => 09710266 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'Instruction to compute the distance to a specified memory boundary' [patent_app_type] => utility [patent_app_number] => 13/421451 [patent_app_country] => US [patent_app_date] => 2012-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 35 [patent_no_of_words] => 16500 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13421451 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/421451
Instruction to compute the distance to a specified memory boundary Mar 14, 2012 Issued
Array ( [id] => 11232640 [patent_doc_number] => 09459868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-04 [patent_title] => 'Instruction to load data up to a dynamically determined memory boundary' [patent_app_type] => utility [patent_app_number] => 13/421599 [patent_app_country] => US [patent_app_date] => 2012-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 16 [patent_no_of_words] => 17143 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 372 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13421599 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/421599
Instruction to load data up to a dynamically determined memory boundary Mar 14, 2012 Issued
Array ( [id] => 9044099 [patent_doc_number] => 20130246737 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-19 [patent_title] => 'SIMD Compare Instruction Using Permute Logic for Distributed Register Files' [patent_app_type] => utility [patent_app_number] => 13/420699 [patent_app_country] => US [patent_app_date] => 2012-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10314 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13420699 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/420699
SIMD compare instruction using permute logic for distributed register files Mar 14, 2012 Issued
Menu