Search

Carlos O. Rivera-perez

Examiner (ID: 6630, Phone: (571)272-2432 , Office: P/2838 )

Most Active Art Unit
2838
Art Unit(s)
2838, 2839
Total Applications
549
Issued Applications
360
Pending Applications
71
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16927168 [patent_doc_number] => 11048652 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-29 [patent_title] => Apparatus and methods for in data path compute operations [patent_app_type] => utility [patent_app_number] => 17/080075 [patent_app_country] => US [patent_app_date] => 2020-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 25739 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17080075 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/080075
Apparatus and methods for in data path compute operations Oct 25, 2020 Issued
Array ( [id] => 16819673 [patent_doc_number] => 11004510 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Cross-point memory compensation [patent_app_type] => utility [patent_app_number] => 16/895905 [patent_app_country] => US [patent_app_date] => 2020-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 9059 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16895905 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/895905
Cross-point memory compensation Jun 7, 2020 Issued
Array ( [id] => 16624607 [patent_doc_number] => 20210043260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-02-11 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 16/787368 [patent_app_country] => US [patent_app_date] => 2020-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9632 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16787368 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/787368
Semiconductor memory device with erase control Feb 10, 2020 Issued
Array ( [id] => 15872927 [patent_doc_number] => 20200143867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => SEMICONDUCTOR DEVICE HAVING INTERCONNECTION IN PACKAGE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 16/734821 [patent_app_country] => US [patent_app_date] => 2020-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11683 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 352 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16734821 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/734821
Semiconductor device having interconnection in package and method for manufacturing the same Jan 5, 2020 Issued
Array ( [id] => 16880896 [patent_doc_number] => 11031051 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Memory device with recycling arrangement for gleaned charge [patent_app_type] => utility [patent_app_number] => 16/698552 [patent_app_country] => US [patent_app_date] => 2019-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7039 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16698552 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/698552
Memory device with recycling arrangement for gleaned charge Nov 26, 2019 Issued
Array ( [id] => 16218239 [patent_doc_number] => 10734059 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-04 [patent_title] => Semiconductor device having interconnection in package and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/674554 [patent_app_country] => US [patent_app_date] => 2019-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 11684 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16674554 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/674554
Semiconductor device having interconnection in package and method for manufacturing the same Nov 4, 2019 Issued
Array ( [id] => 15500749 [patent_doc_number] => 20200050563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-02-13 [patent_title] => APPARATUS AND METHODS FOR IN DATA PATH COMPUTE OPERATIONS [patent_app_type] => utility [patent_app_number] => 16/655545 [patent_app_country] => US [patent_app_date] => 2019-10-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 25714 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16655545 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/655545
Apparatus and methods for in data path compute operations Oct 16, 2019 Issued
Array ( [id] => 15442235 [patent_doc_number] => 20200035301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => Semiconductor Memory Having Both Volatile and Non-Volatile Functionality and Method of Operating [patent_app_type] => utility [patent_app_number] => 16/591858 [patent_app_country] => US [patent_app_date] => 2019-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18436 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16591858 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/591858
Semiconductor memory having both volatile and non-volatile functionality and method of operating Oct 2, 2019 Issued
Array ( [id] => 16707910 [patent_doc_number] => 10957854 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-23 [patent_title] => Tunable resistive element [patent_app_type] => utility [patent_app_number] => 16/585774 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 4586 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16585774 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/585774
Tunable resistive element Sep 26, 2019 Issued
Array ( [id] => 15271513 [patent_doc_number] => 20190384491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => SOLID STATE DRIVE DEVICES AND STORAGE SYSTEMS HAVING THE SAME [patent_app_type] => utility [patent_app_number] => 16/556567 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9142 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16556567 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/556567
Solid state drive devices and storage systems having the same Aug 29, 2019 Issued
Array ( [id] => 16759596 [patent_doc_number] => 10978151 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-13 [patent_title] => Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate [patent_app_type] => utility [patent_app_number] => 16/541971 [patent_app_country] => US [patent_app_date] => 2019-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 8744 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 457 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16541971 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/541971
Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate Aug 14, 2019 Issued
Array ( [id] => 16308434 [patent_doc_number] => 10777237 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-15 [patent_title] => Semiconductor memory device and method of operating the same [patent_app_type] => utility [patent_app_number] => 16/503989 [patent_app_country] => US [patent_app_date] => 2019-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 13 [patent_no_of_words] => 9646 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16503989 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/503989
Semiconductor memory device and method of operating the same Jul 4, 2019 Issued
Array ( [id] => 15122951 [patent_doc_number] => 20190348109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => SEMICONDUCTOR DEVICE WITH A PLURALITY OF SURROUNDING GATE TRANSISTORS [patent_app_type] => utility [patent_app_number] => 16/386748 [patent_app_country] => US [patent_app_date] => 2019-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 32199 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 443 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16386748 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/386748
Semiconductor device with a plurality of surrounding gate transistors Apr 16, 2019 Issued
Array ( [id] => 14919965 [patent_doc_number] => 10431309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-01 [patent_title] => Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate [patent_app_type] => utility [patent_app_number] => 16/379194 [patent_app_country] => US [patent_app_date] => 2019-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 16 [patent_no_of_words] => 8721 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 458 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16379194 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/379194
Semiconductor memory device with memory cells each including a charge accumulation layer and a control gate Apr 8, 2019 Issued
Array ( [id] => 14969441 [patent_doc_number] => 20190312199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-10 [patent_title] => TUNABLE RESISTIVE ELEMENT [patent_app_type] => utility [patent_app_number] => 16/287262 [patent_app_country] => US [patent_app_date] => 2019-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4587 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16287262 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/287262
Tunable resistive element Feb 26, 2019 Issued
Array ( [id] => 15077171 [patent_doc_number] => 10468080 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-11-05 [patent_title] => Memory device performing write leveling operation [patent_app_type] => utility [patent_app_number] => 16/277525 [patent_app_country] => US [patent_app_date] => 2019-02-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3556 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16277525 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/277525
Memory device performing write leveling operation Feb 14, 2019 Issued
Array ( [id] => 14706609 [patent_doc_number] => 10381062 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-13 [patent_title] => Non-volatile semiconductor storage device [patent_app_type] => utility [patent_app_number] => 16/266642 [patent_app_country] => US [patent_app_date] => 2019-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6940 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16266642 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/266642
Non-volatile semiconductor storage device Feb 3, 2019 Issued
Array ( [id] => 14721885 [patent_doc_number] => 20190252006 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-08-15 [patent_title] => BIT LINE POWER SUPPLY APPARATUS [patent_app_type] => utility [patent_app_number] => 16/261460 [patent_app_country] => US [patent_app_date] => 2019-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6736 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 285 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16261460 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/261460
Bit line power supply apparatus Jan 28, 2019 Issued
Array ( [id] => 16372161 [patent_doc_number] => 10803927 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Partitioned memory circuit capable of implementing calculation operations [patent_app_type] => utility [patent_app_number] => 16/224723 [patent_app_country] => US [patent_app_date] => 2018-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 13714 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 244 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16224723 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/224723
Partitioned memory circuit capable of implementing calculation operations Dec 17, 2018 Issued
Array ( [id] => 15012865 [patent_doc_number] => 10452578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Apparatus and methods for in data path compute operations [patent_app_type] => utility [patent_app_number] => 16/220912 [patent_app_country] => US [patent_app_date] => 2018-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 25686 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16220912 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/220912
Apparatus and methods for in data path compute operations Dec 13, 2018 Issued
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