Search

Carlos R Ortiz Rodriguez

Examiner (ID: 5168, Phone: (571)272-3766 , Office: P/2127 )

Most Active Art Unit
2119
Art Unit(s)
2127, 2122, 2119, 2123, 2125
Total Applications
923
Issued Applications
646
Pending Applications
78
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18379779 [patent_doc_number] => 20230154868 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => SEMICONDUCTOR DEVICES WITH REINFORCED SUBSTRATES [patent_app_type] => utility [patent_app_number] => 18/151029 [patent_app_country] => US [patent_app_date] => 2023-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6999 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18151029 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/151029
SEMICONDUCTOR DEVICES WITH REINFORCED SUBSTRATES Jan 5, 2023 Pending
Array ( [id] => 18394883 [patent_doc_number] => 20230163104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => SEMICONDUCTOR PACKAGE HAVING PADS WITH STEPPED STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/092994 [patent_app_country] => US [patent_app_date] => 2023-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11528 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18092994 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/092994
Semiconductor package having pads with stepped structure Jan 3, 2023 Issued
Array ( [id] => 18336954 [patent_doc_number] => 20230128903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => ENHANCED BASE DIE HEAT PATH USING THROUGH-SILICON VIAS [patent_app_type] => utility [patent_app_number] => 18/088478 [patent_app_country] => US [patent_app_date] => 2022-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6982 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18088478 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/088478
ENHANCED BASE DIE HEAT PATH USING THROUGH-SILICON VIAS Dec 22, 2022 Pending
Array ( [id] => 18297880 [patent_doc_number] => 20230107566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-06 [patent_title] => IMAGING UNIT, METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 18/060216 [patent_app_country] => US [patent_app_date] => 2022-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18060216 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/060216
IMAGING UNIT, METHOD FOR MANUFACTURING THE SAME, AND ELECTRONIC APPARATUS Nov 29, 2022 Pending
Array ( [id] => 18252965 [patent_doc_number] => 20230080004 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => MANUFACTURING A MODULE WITH SOLDER BODY HAVING ELEVATED EDGE [patent_app_type] => utility [patent_app_number] => 17/989196 [patent_app_country] => US [patent_app_date] => 2022-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6784 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17989196 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/989196
Manufacturing a module with solder body having elevated edge Nov 16, 2022 Issued
Array ( [id] => 18249018 [patent_doc_number] => 11605616 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-03-14 [patent_title] => 3D semiconductor device and structure with metal layers [patent_app_type] => utility [patent_app_number] => 17/986831 [patent_app_country] => US [patent_app_date] => 2022-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 66 [patent_no_of_words] => 24676 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17986831 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/986831
3D semiconductor device and structure with metal layers Nov 13, 2022 Issued
Array ( [id] => 18243208 [patent_doc_number] => 20230075519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-09 [patent_title] => PACKAGE INCLUDING MULTIPLE SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 18/055139 [patent_app_country] => US [patent_app_date] => 2022-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10622 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18055139 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/055139
PACKAGE INCLUDING MULTIPLE SEMICONDUCTOR DEVICES Nov 13, 2022 Pending
Array ( [id] => 18258240 [patent_doc_number] => 20230085280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-16 [patent_title] => PACKAGE STRUCTURE WITH BUFFER LAYER EMBEDDED IN LID LAYER [patent_app_type] => utility [patent_app_number] => 17/984259 [patent_app_country] => US [patent_app_date] => 2022-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9713 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17984259 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/984259
Package structure with buffer layer embedded in lid layer Nov 9, 2022 Issued
Array ( [id] => 18207195 [patent_doc_number] => 20230053451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-23 [patent_title] => SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/980656 [patent_app_country] => US [patent_app_date] => 2022-11-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9360 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17980656 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/980656
SEMICONDUCTOR DEVICE STRUCTURE AND METHOD FOR FORMING THE SAME Nov 3, 2022 Pending
Array ( [id] => 18195388 [patent_doc_number] => 20230048907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => INTEGRATED CIRCUIT, PACKAGE STRUCTURE, AND MANUFACTURING METHOD OF PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/978225 [patent_app_country] => US [patent_app_date] => 2022-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17978225 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/978225
INTEGRATED CIRCUIT, PACKAGE STRUCTURE, AND MANUFACTURING METHOD OF PACKAGE STRUCTURE Oct 31, 2022 Pending
Array ( [id] => 19183860 [patent_doc_number] => 11990461 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-21 [patent_title] => Integrated circuit package for high bandwidth memory [patent_app_type] => utility [patent_app_number] => 17/970237 [patent_app_country] => US [patent_app_date] => 2022-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8004 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17970237 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/970237
Integrated circuit package for high bandwidth memory Oct 19, 2022 Issued
Array ( [id] => 18967499 [patent_doc_number] => 11901280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-02-13 [patent_title] => Ground via clustering for crosstalk mitigation [patent_app_type] => utility [patent_app_number] => 17/956766 [patent_app_country] => US [patent_app_date] => 2022-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7682 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17956766 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/956766
Ground via clustering for crosstalk mitigation Sep 28, 2022 Issued
Array ( [id] => 18166057 [patent_doc_number] => 20230032658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => SEMICONDUCTOR CHIP PACKAGE AND METHOD OF ASSEMBLY [patent_app_type] => utility [patent_app_number] => 17/940125 [patent_app_country] => US [patent_app_date] => 2022-09-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17940125 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/940125
Semiconductor chip package and method of assembly Sep 7, 2022 Issued
Array ( [id] => 18097409 [patent_doc_number] => 20220415750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => THERMOELECTRIC SEMICONDUCTOR DEVICE AND METHOD OF MAKING SAME [patent_app_type] => utility [patent_app_number] => 17/902641 [patent_app_country] => US [patent_app_date] => 2022-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5054 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17902641 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/902641
Thermoelectric semiconductor device and method of making same Sep 1, 2022 Issued
Array ( [id] => 18081155 [patent_doc_number] => 20220406767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => POWER MODULE PACKAGE FOR DIRECT COOLING MULTIPLE POWER MODULES [patent_app_type] => utility [patent_app_number] => 17/822844 [patent_app_country] => US [patent_app_date] => 2022-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8869 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17822844 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/822844
Power module package for direct cooling multiple power modules Aug 28, 2022 Issued
Array ( [id] => 18068152 [patent_doc_number] => 20220399240 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => SEMICONDUCTOR PACKAGE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 17/893033 [patent_app_country] => US [patent_app_date] => 2022-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13635 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17893033 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/893033
Semiconductor package structure and method for manufacturing the same Aug 21, 2022 Issued
Array ( [id] => 18073759 [patent_doc_number] => 11532599 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-20 [patent_title] => 3D semiconductor device and structure with metal layers [patent_app_type] => utility [patent_app_number] => 17/882607 [patent_app_country] => US [patent_app_date] => 2022-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 61 [patent_figures_cnt] => 66 [patent_no_of_words] => 24277 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17882607 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/882607
3D semiconductor device and structure with metal layers Aug 7, 2022 Issued
Array ( [id] => 18874757 [patent_doc_number] => 11862580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-02 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 17/874308 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8881 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874308 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874308
Semiconductor package Jul 26, 2022 Issued
Array ( [id] => 17993393 [patent_doc_number] => 20220359430 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/874030 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7760 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874030 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/874030
Package structure Jul 25, 2022 Issued
Array ( [id] => 18720400 [patent_doc_number] => 11797746 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-24 [patent_title] => Method of forming semiconductor device having more similar cell densities in alternating rows [patent_app_type] => utility [patent_app_number] => 17/865272 [patent_app_country] => US [patent_app_date] => 2022-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 28 [patent_no_of_words] => 14858 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17865272 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/865272
Method of forming semiconductor device having more similar cell densities in alternating rows Jul 13, 2022 Issued
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