Search

Carlos R Ortiz Rodriguez

Examiner (ID: 5168, Phone: (571)272-3766 , Office: P/2127 )

Most Active Art Unit
2119
Art Unit(s)
2127, 2122, 2119, 2123, 2125
Total Applications
923
Issued Applications
646
Pending Applications
78
Abandoned Applications
199

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18394891 [patent_doc_number] => 20230163112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => INTEGRATED CIRCUIT (IC) PACKAGES EMPLOYING A PACKAGE SUBSTRATE WITH A DOUBLE SIDE EMBEDDED TRACE SUBSTRATE (ETS), AND RELATED FABRICATION METHODS [patent_app_type] => utility [patent_app_number] => 17/456068 [patent_app_country] => US [patent_app_date] => 2021-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16271 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17456068 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/456068
Integrated circuit (IC) packages employing a package substrate with a double side embedded trace substrate (ETS), and related fabrication methods Nov 21, 2021 Issued
Array ( [id] => 18913100 [patent_doc_number] => 11876088 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-01-16 [patent_title] => Shared well structure, layout, and method [patent_app_type] => utility [patent_app_number] => 17/527883 [patent_app_country] => US [patent_app_date] => 2021-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 16189 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17527883 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/527883
Shared well structure, layout, and method Nov 15, 2021 Issued
Array ( [id] => 18415974 [patent_doc_number] => 11670520 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-06 [patent_title] => Package structure with interconnection between chips and packaging method thereof [patent_app_type] => utility [patent_app_number] => 17/523093 [patent_app_country] => US [patent_app_date] => 2021-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 24 [patent_no_of_words] => 7144 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17523093 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/523093
Package structure with interconnection between chips and packaging method thereof Nov 9, 2021 Issued
Array ( [id] => 18350807 [patent_doc_number] => 20230138918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-04 [patent_title] => INTEGRATED CIRCUIT PACKAGE WITH SERPENTINE CONDUCTOR AND METHOD OF MAKING [patent_app_type] => utility [patent_app_number] => 17/514722 [patent_app_country] => US [patent_app_date] => 2021-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3796 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17514722 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/514722
INTEGRATED CIRCUIT PACKAGE WITH SERPENTINE CONDUCTOR AND METHOD OF MAKING Oct 28, 2021 Pending
Array ( [id] => 18321814 [patent_doc_number] => 20230119942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => Package with Compartmentalized Lid for Heat Spreader and EMI Shield [patent_app_type] => utility [patent_app_number] => 17/451036 [patent_app_country] => US [patent_app_date] => 2021-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4051 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17451036 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/451036
Package with compartmentalized lid for heat spreader and EMI shield Oct 14, 2021 Issued
Array ( [id] => 18311440 [patent_doc_number] => 20230115340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => LEADLESS POWER AMPLIFIER PACKAGES INCLUDING TOPSIDE TERMINATION INTERPOSER ARRANGEMENTS AND METHODS FOR THE FABRICATION THEREOF [patent_app_type] => utility [patent_app_number] => 17/491309 [patent_app_country] => US [patent_app_date] => 2021-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18174 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17491309 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/491309
Leadless power amplifier packages including topside termination interposer arrangements and methods for the fabrication thereof Sep 29, 2021 Issued
Array ( [id] => 17360006 [patent_doc_number] => 20220020802 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-01-20 [patent_title] => IMAGE SENSOR AND METHOD FOR MANUFACTURING IMAGE SENSOR [patent_app_type] => utility [patent_app_number] => 17/488817 [patent_app_country] => US [patent_app_date] => 2021-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13336 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17488817 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/488817
Image sensor and method for manufacturing image sensor Sep 28, 2021 Issued
Array ( [id] => 18304446 [patent_doc_number] => 11626360 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-11 [patent_title] => Semiconductor device package and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 17/486829 [patent_app_country] => US [patent_app_date] => 2021-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 7098 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17486829 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/486829
Semiconductor device package and method for manufacturing the same Sep 26, 2021 Issued
Array ( [id] => 18371930 [patent_doc_number] => 11652112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => SLT integrated circuit capacitor structure and methods [patent_app_type] => utility [patent_app_number] => 17/486571 [patent_app_country] => US [patent_app_date] => 2021-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7327 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17486571 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/486571
SLT integrated circuit capacitor structure and methods Sep 26, 2021 Issued
Array ( [id] => 17692194 [patent_doc_number] => 20220199487 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE FABRICATION METHOD [patent_app_type] => utility [patent_app_number] => 17/478991 [patent_app_country] => US [patent_app_date] => 2021-09-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 18 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17478991 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/478991
Semiconductor device and semiconductor device fabrication method Sep 19, 2021 Issued
Array ( [id] => 18224857 [patent_doc_number] => 20230063851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME, AND SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 17/461971 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8083 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17461971 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/461971
Semiconductor device and method for manufacturing the same, and semiconductor package Aug 29, 2021 Issued
Array ( [id] => 18228355 [patent_doc_number] => 20230067349 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => PACKAGE STRUCTURE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/460302 [patent_app_country] => US [patent_app_date] => 2021-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8219 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17460302 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/460302
Package structure and method of forming the same Aug 28, 2021 Issued
Array ( [id] => 17855276 [patent_doc_number] => 20220285319 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/459376 [patent_app_country] => US [patent_app_date] => 2021-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7660 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17459376 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/459376
Semiconductor device Aug 26, 2021 Issued
Array ( [id] => 18227378 [patent_doc_number] => 20230066372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => THREE-DIMENSIONAL DEVICE STRUCTURE INCLUDING EMBEDDED INTEGRATED PASSIVE DEVICE AND METHODS OF MAKING THE SAME [patent_app_type] => utility [patent_app_number] => 17/446038 [patent_app_country] => US [patent_app_date] => 2021-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446038 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446038
Three-dimensional device structure including embedded integrated passive device and methods of making the same Aug 25, 2021 Issued
Array ( [id] => 18639565 [patent_doc_number] => 11764188 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-19 [patent_title] => Electronic package and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 17/411228 [patent_app_country] => US [patent_app_date] => 2021-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2961 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17411228 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/411228
Electronic package and manufacturing method thereof Aug 24, 2021 Issued
Array ( [id] => 17278061 [patent_doc_number] => 20210384259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-09 [patent_title] => SEMICONDUCTOR MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/407896 [patent_app_country] => US [patent_app_date] => 2021-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4915 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17407896 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/407896
Semiconductor memory device Aug 19, 2021 Issued
Array ( [id] => 18520828 [patent_doc_number] => 11710723 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Thermal management of three-dimensional integrated circuits [patent_app_type] => utility [patent_app_number] => 17/401719 [patent_app_country] => US [patent_app_date] => 2021-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 9904 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17401719 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/401719
Thermal management of three-dimensional integrated circuits Aug 12, 2021 Issued
Array ( [id] => 17993308 [patent_doc_number] => 20220359345 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => COPLANAR CONTROL FOR FILM-TYPE THERMAL INTERFACE [patent_app_type] => utility [patent_app_number] => 17/392904 [patent_app_country] => US [patent_app_date] => 2021-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17392904 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/392904
Coplanar control for film-type thermal interface Aug 2, 2021 Issued
Array ( [id] => 18168010 [patent_doc_number] => 20230034619 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => INTERCONNECTION STRUCTURES TO IMPROVE SIGNAL INTEGRITY WITHIN STACKED DIES [patent_app_type] => utility [patent_app_number] => 17/391290 [patent_app_country] => US [patent_app_date] => 2021-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7764 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17391290 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/391290
Interconnection structures to improve signal integrity within stacked dies Aug 1, 2021 Issued
Array ( [id] => 18024376 [patent_doc_number] => 20220375875 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => CRACK STOP RING TRENCH TO PREVENT EPITAXY CRACK PROPAGATION [patent_app_type] => utility [patent_app_number] => 17/391341 [patent_app_country] => US [patent_app_date] => 2021-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10296 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17391341 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/391341
Crack stop ring trench to prevent epitaxy crack propagation Aug 1, 2021 Issued
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