Search

Carmen E. Arellano-lado

Examiner (ID: 17332)

Most Active Art Unit
2902
Art Unit(s)
2902, 2903, 2922, 2913, 2900
Total Applications
3019
Issued Applications
2980
Pending Applications
1
Abandoned Applications
38

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 15030449 [patent_doc_number] => 20190326229 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => SECURE SEMICONDUCTOR CHIP BY PIEZOELECTRICITY [patent_app_type] => utility [patent_app_number] => 16/460323 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6436 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460323 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/460323
Secure semiconductor chip by piezoelectricity Jul 1, 2019 Issued
Array ( [id] => 15028185 [patent_doc_number] => 20190325097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-10-24 [patent_title] => System And Method For Modeling Building Heating Energy Consumption With The Aid Of A Digital Computer [patent_app_type] => utility [patent_app_number] => 16/458502 [patent_app_country] => US [patent_app_date] => 2019-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16397 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16458502 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/458502
System and method for modeling building heating energy consumption with the aid of a digital computer Jun 30, 2019 Issued
Array ( [id] => 15093265 [patent_doc_number] => 20190341444 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-07 [patent_title] => ELECTRONIC DEVICES HAVING SPIRAL CONDUCTIVE STRUCTURES [patent_app_type] => utility [patent_app_number] => 16/456610 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14112 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456610 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/456610
Electronic devices having spiral conductive structures Jun 27, 2019 Issued
Array ( [id] => 16372650 [patent_doc_number] => 10804416 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Integrated graphene detectors with waveguides [patent_app_type] => utility [patent_app_number] => 16/438863 [patent_app_country] => US [patent_app_date] => 2019-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 4102 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16438863 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/438863
Integrated graphene detectors with waveguides Jun 11, 2019 Issued
Array ( [id] => 15260003 [patent_doc_number] => 20190378735 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-12 [patent_title] => SUBSTRATE TRANSFER APPARATUS, SUBSTRATE PROCESSING APPARATUS INCLUDING THE SAME, AND SUBSTRATE MISALIGNMENT COMPENSATION METHOD [patent_app_type] => utility [patent_app_number] => 16/430631 [patent_app_country] => US [patent_app_date] => 2019-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5670 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16430631 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/430631
Substrate transfer apparatus, substrate processing apparatus including the same, and substrate misalignment compensation method Jun 3, 2019 Issued
Array ( [id] => 14875403 [patent_doc_number] => 20190287943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-09-19 [patent_title] => POWER PACKAGE MODULE OF MULTIPLE POWER CHIPS AND METHOD OF MANUFACTURING POWER CHIP UNIT [patent_app_type] => utility [patent_app_number] => 16/428231 [patent_app_country] => US [patent_app_date] => 2019-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8766 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16428231 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/428231
POWER PACKAGE MODULE OF MULTIPLE POWER CHIPS AND METHOD OF MANUFACTURING POWER CHIP UNIT May 30, 2019 Abandoned
Array ( [id] => 17269658 [patent_doc_number] => 11195086 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-07 [patent_title] => Neuromorphic computing device utilizing a biological neural lattice [patent_app_type] => utility [patent_app_number] => 16/423967 [patent_app_country] => US [patent_app_date] => 2019-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5817 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16423967 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/423967
Neuromorphic computing device utilizing a biological neural lattice May 27, 2019 Issued
Array ( [id] => 16487774 [patent_doc_number] => 20200381383 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => Semiconductor Packaging Substrate Fine Pitch Metal Bump and Reinforcement Structures [patent_app_type] => utility [patent_app_number] => 16/423931 [patent_app_country] => US [patent_app_date] => 2019-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5191 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16423931 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/423931
Semiconductor packaging substrate fine pitch metal bump and reinforcement structures May 27, 2019 Issued
Array ( [id] => 15154843 [patent_doc_number] => 20190355899 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-21 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/413029 [patent_app_country] => US [patent_app_date] => 2019-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2926 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413029 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/413029
SEMICONDUCTOR DEVICE May 14, 2019 Abandoned
Array ( [id] => 16316179 [patent_doc_number] => 20200294917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-17 [patent_title] => PACKAGE ON PACKAGE AND PACKAGE CONNECTION SYSTEM COMPRISING THE SAME [patent_app_type] => utility [patent_app_number] => 16/413039 [patent_app_country] => US [patent_app_date] => 2019-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13345 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413039 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/413039
Package on package and package connection system comprising the same May 14, 2019 Issued
Array ( [id] => 17189294 [patent_doc_number] => 20210336179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-28 [patent_title] => DISPLAY PANEL AND MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/494405 [patent_app_country] => US [patent_app_date] => 2019-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4583 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16494405 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/494405
DISPLAY PANEL AND MANUFACTURING METHOD THEREOF AND DISPLAY DEVICE May 14, 2019 Abandoned
Array ( [id] => 16645781 [patent_doc_number] => 10923649 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Spin current magnetization rotation magnetoresistance effect element, and magnetic memory [patent_app_type] => utility [patent_app_number] => 16/413066 [patent_app_country] => US [patent_app_date] => 2019-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 8457 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413066 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/413066
Spin current magnetization rotation magnetoresistance effect element, and magnetic memory May 14, 2019 Issued
Array ( [id] => 16001281 [patent_doc_number] => 20200176511 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-04 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING SPIN-ORBIT TORQUE LINE [patent_app_type] => utility [patent_app_number] => 16/413075 [patent_app_country] => US [patent_app_date] => 2019-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6245 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16413075 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/413075
SEMICONDUCTOR DEVICE INCLUDING SPIN-ORBIT TORQUE LINE May 14, 2019 Abandoned
Array ( [id] => 17203701 [patent_doc_number] => 20210343796 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => DISPLAY PANEL, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/622003 [patent_app_country] => US [patent_app_date] => 2019-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5702 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16622003 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/622003
Display panel, manufacturing method thereof, and display device May 14, 2019 Issued
Array ( [id] => 16638108 [patent_doc_number] => 10916623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-09 [patent_title] => Semiconductor device including capacitor and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/412961 [patent_app_country] => US [patent_app_date] => 2019-05-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 25 [patent_no_of_words] => 5596 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16412961 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/412961
Semiconductor device including capacitor and method of forming the same May 14, 2019 Issued
Array ( [id] => 15331475 [patent_doc_number] => 20200006067 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => GERMANIUM NANOSHEETS AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 16/408273 [patent_app_country] => US [patent_app_date] => 2019-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10846 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16408273 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/408273
Germanium nanosheets and methods of forming the same May 8, 2019 Issued
Array ( [id] => 16521612 [patent_doc_number] => 10872837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-22 [patent_title] => Air-cavity semiconductor package with low cost high thermal carrier [patent_app_type] => utility [patent_app_number] => 16/406724 [patent_app_country] => US [patent_app_date] => 2019-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 4768 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 224 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16406724 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/406724
Air-cavity semiconductor package with low cost high thermal carrier May 7, 2019 Issued
Array ( [id] => 16896465 [patent_doc_number] => 11038028 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-15 [patent_title] => Semiconductor device and manufacturing method [patent_app_type] => utility [patent_app_number] => 16/406773 [patent_app_country] => US [patent_app_date] => 2019-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 4333 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16406773 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/406773
Semiconductor device and manufacturing method May 7, 2019 Issued
Array ( [id] => 16119867 [patent_doc_number] => 20200211956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-02 [patent_title] => SEMICONDUCTOR PACKAGE WITH IMPROVED INTERPOSER STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/406600 [patent_app_country] => US [patent_app_date] => 2019-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11785 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16406600 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/406600
Semiconductor package with improved interposer structure May 7, 2019 Issued
Array ( [id] => 16502529 [patent_doc_number] => 10867925 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-15 [patent_title] => Method for forming chip package structure [patent_app_type] => utility [patent_app_number] => 16/406874 [patent_app_country] => US [patent_app_date] => 2019-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 8675 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16406874 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/406874
Method for forming chip package structure May 7, 2019 Issued
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