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Carolyn Fields

Examiner (ID: 17345)

Most Active Art Unit
2506
Art Unit(s)
2506, 2878
Total Applications
1409
Issued Applications
1263
Pending Applications
13
Abandoned Applications
133

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17436033 [patent_doc_number] => 11261346 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-01 [patent_title] => Polishing composition [patent_app_type] => utility [patent_app_number] => 16/090195 [patent_app_country] => US [patent_app_date] => 2017-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6423 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16090195 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/090195
Polishing composition Mar 21, 2017 Issued
Array ( [id] => 11974560 [patent_doc_number] => 20170278714 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-28 [patent_title] => 'CONTROL DEVICE, SUBSTRATE PROCESSING SYSTEM, SUBSTRATE PROCESSING METHOD, AND PROGRAM' [patent_app_type] => utility [patent_app_number] => 15/466277 [patent_app_country] => US [patent_app_date] => 2017-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 8430 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15466277 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/466277
Control device, substrate processing system, substrate processing method, and program Mar 21, 2017 Issued
Array ( [id] => 13131797 [patent_doc_number] => 10083837 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-25 [patent_title] => Methods of forming patterns using imprint process [patent_app_type] => utility [patent_app_number] => 15/464700 [patent_app_country] => US [patent_app_date] => 2017-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5158 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15464700 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/464700
Methods of forming patterns using imprint process Mar 20, 2017 Issued
Array ( [id] => 12026847 [patent_doc_number] => 20170316946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'METHODS FOR CHEMICAL ETCHING OF SILICON' [patent_app_type] => utility [patent_app_number] => 15/459536 [patent_app_country] => US [patent_app_date] => 2017-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4361 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15459536 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/459536
Methods for chemical etching of silicon Mar 14, 2017 Issued
Array ( [id] => 14110027 [patent_doc_number] => 20190096689 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => PLASMA ETCHING METHOD [patent_app_type] => utility [patent_app_number] => 16/081939 [patent_app_country] => US [patent_app_date] => 2017-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12404 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16081939 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/081939
Plasma etching method Mar 7, 2017 Issued
Array ( [id] => 12263666 [patent_doc_number] => 20180082862 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-03-22 [patent_title] => 'SUBSTRATE PROCESSING DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 15/446966 [patent_app_country] => US [patent_app_date] => 2017-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3652 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15446966 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/446966
Substrate processing device and method of manufacturing semiconductor device Feb 28, 2017 Issued
Array ( [id] => 11694412 [patent_doc_number] => 20170170129 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-15 [patent_title] => 'PHOTOLITHOGRAPHY ALIGNMENT MARK STRUCTURES AND SEMICONDUCTOR STRUCTURES' [patent_app_type] => utility [patent_app_number] => 15/445076 [patent_app_country] => US [patent_app_date] => 2017-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7163 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15445076 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/445076
Photolithography alignment mark structures and semiconductor structures Feb 27, 2017 Issued
Array ( [id] => 17089817 [patent_doc_number] => 11117996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-14 [patent_title] => Self-assembly composition for pattern formation and pattern forming method [patent_app_type] => utility [patent_app_number] => 16/303285 [patent_app_country] => US [patent_app_date] => 2017-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 18049 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 371 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16303285 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/303285
Self-assembly composition for pattern formation and pattern forming method Feb 26, 2017 Issued
Array ( [id] => 13271003 [patent_doc_number] => 10147588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-04 [patent_title] => System and method for increasing electron density levels in a plasma of a substrate processing system [patent_app_type] => utility [patent_app_number] => 15/427163 [patent_app_country] => US [patent_app_date] => 2017-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5627 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15427163 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/427163
System and method for increasing electron density levels in a plasma of a substrate processing system Feb 7, 2017 Issued
Array ( [id] => 13005897 [patent_doc_number] => 10026619 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-17 [patent_title] => Plasma treatment method [patent_app_type] => utility [patent_app_number] => 15/426192 [patent_app_country] => US [patent_app_date] => 2017-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 22 [patent_no_of_words] => 7765 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15426192 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/426192
Plasma treatment method Feb 6, 2017 Issued
Array ( [id] => 15061203 [patent_doc_number] => 10460913 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-29 [patent_title] => Plasma processing apparatus and plasma processing method [patent_app_type] => utility [patent_app_number] => 15/562353 [patent_app_country] => US [patent_app_date] => 2017-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 16200 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15562353 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/562353
Plasma processing apparatus and plasma processing method Jan 29, 2017 Issued
Array ( [id] => 11760451 [patent_doc_number] => 20170207320 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-20 [patent_title] => 'CONSUMPTION OF THE CHANNEL OF A TRANSISTOR BY SACRIFICIAL OXIDATION' [patent_app_type] => utility [patent_app_number] => 15/408793 [patent_app_country] => US [patent_app_date] => 2017-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7124 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15408793 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/408793
Consumption of the channel of a transistor by sacrificial oxidation Jan 17, 2017 Issued
Array ( [id] => 14491909 [patent_doc_number] => 10332753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-25 [patent_title] => Wet etching of samarium selenium for piezoelectric processing [patent_app_type] => utility [patent_app_number] => 15/405546 [patent_app_country] => US [patent_app_date] => 2017-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4463 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15405546 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/405546
Wet etching of samarium selenium for piezoelectric processing Jan 12, 2017 Issued
Array ( [id] => 14205083 [patent_doc_number] => 10269663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Critical dimensions variance compensation [patent_app_type] => utility [patent_app_number] => 15/400657 [patent_app_country] => US [patent_app_date] => 2017-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5346 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15400657 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/400657
Critical dimensions variance compensation Jan 5, 2017 Issued
Array ( [id] => 13070973 [patent_doc_number] => 10056271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-21 [patent_title] => Metal etch system [patent_app_type] => utility [patent_app_number] => 15/398556 [patent_app_country] => US [patent_app_date] => 2017-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11033 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15398556 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/398556
Metal etch system Jan 3, 2017 Issued
Array ( [id] => 12622425 [patent_doc_number] => 20180099305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-04-12 [patent_title] => LIQUID LEVEL CONTROL SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 15/396335 [patent_app_country] => US [patent_app_date] => 2016-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2089 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15396335 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/396335
LIQUID LEVEL CONTROL SYSTEM AND METHOD Dec 29, 2016 Abandoned
Array ( [id] => 11571651 [patent_doc_number] => 20170110296 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'CONNECTION CONTROL METHOD' [patent_app_type] => utility [patent_app_number] => 15/391108 [patent_app_country] => US [patent_app_date] => 2016-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5995 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15391108 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/391108
Connection control method Dec 26, 2016 Issued
Array ( [id] => 12872374 [patent_doc_number] => 20180182633 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-28 [patent_title] => SYSTEMS AND METHODS FOR ANISOTROPIC MATERIAL BREAKTHROUGH [patent_app_type] => utility [patent_app_number] => 15/390955 [patent_app_country] => US [patent_app_date] => 2016-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9259 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15390955 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/390955
Systems and methods for anisotropic material breakthrough Dec 26, 2016 Issued
Array ( [id] => 12849043 [patent_doc_number] => 20180174854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-21 [patent_title] => Fin-Like Field Effect Transistor Patterning Methods for Increasing Process Margins [patent_app_type] => utility [patent_app_number] => 15/382035 [patent_app_country] => US [patent_app_date] => 2016-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12253 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15382035 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/382035
Fin-like field effect transistor patterning methods for increasing process margins Dec 15, 2016 Issued
Array ( [id] => 12823324 [patent_doc_number] => 20180166280 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => Methods and Apparatus for Preventing Counter-Doping During High Temperature Processing [patent_app_type] => utility [patent_app_number] => 15/379251 [patent_app_country] => US [patent_app_date] => 2016-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2273 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 77 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15379251 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/379251
Methods and apparatus for preventing counter-doping during high temperature processing Dec 13, 2016 Issued
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