Caron D. Veynar

Array ( [id] => 16432035 [patent_doc_number] => 10832122 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-10 [patent_title] => Continuous decoding direct neural interface which uses a markov mixture of experts [patent_app_type] => utility [patent_app_number] => 15/615080 [patent_app_country] => US [patent_app_date] => 2017-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4922 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 296 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15615080 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13596497 [patent_doc_number] => 20180349797 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-12-06 [patent_title] => DATA DRIVEN METHODS AND SYSTEMS FOR WHAT IF ANALYSIS [patent_app_type] => utility [patent_app_number] => 15/612999 [patent_app_country] => US [patent_app_date] => 2017-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14755 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 247 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15612999 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16409831 [patent_doc_number] => 10818395 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-10-27 [patent_title] => Learning expert system [patent_app_type] => utility [patent_app_number] => 15/613005 [patent_app_country] => US [patent_app_date] => 2017-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 21317 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 395 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15613005 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16417041 [patent_doc_number] => 10824939 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-03 [patent_title] => Device for implementing artificial neural network with flexible buffer pool structure [patent_app_type] => utility [patent_app_number] => 15/600801 [patent_app_country] => US [patent_app_date] => 2017-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6598 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 276 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15600801 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13919243 [patent_doc_number] => 10203743 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-12 [patent_title] => Reference voltage circuits in microcontroller systems [patent_app_type] => utility [patent_app_number] => 15/490387 [patent_app_country] => US [patent_app_date] => 2017-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2533 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 305 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15490387 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14641917 [patent_doc_number] => 10365702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-07-30 [patent_title] => Autonomic supply voltage compensation for degradation of circuits over circuit lifetime [patent_app_type] => utility [patent_app_number] => 15/482917 [patent_app_country] => US [patent_app_date] => 2017-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 6177 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15482917 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14765833 [patent_doc_number] => 10394311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-27 [patent_title] => Apparatus and method for information processing [patent_app_type] => utility [patent_app_number] => 15/481853 [patent_app_country] => US [patent_app_date] => 2017-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 5657 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 214 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15481853 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12890782 [patent_doc_number] => 20180188769 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-07-05 [patent_title] => MEMORY OVERCLOCKING METHOD AND COMPUTER DEVICE [patent_app_type] => utility [patent_app_number] => 15/481478 [patent_app_country] => US [patent_app_date] => 2017-04-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3647 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15481478 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13466643 [patent_doc_number] => 20180284864 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => DYNAMIC CLOCK AND VOLTAGE SCALING OF CPU SUBSYSTEM BASED ON WI-FI COMMUNICATIONS [patent_app_type] => utility [patent_app_number] => 15/474949 [patent_app_country] => US [patent_app_date] => 2017-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11281 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15474949 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14330093 [patent_doc_number] => 10296063 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Integrated circuit current metering using voltage variation detection circuit [patent_app_type] => utility [patent_app_number] => 15/474635 [patent_app_country] => US [patent_app_date] => 2017-03-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7108 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15474635 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14669119 [patent_doc_number] => 10372460 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-08-06 [patent_title] => System and method for baseboard management controller assisted dynamic early host video on systems with a security co-processor [patent_app_type] => utility [patent_app_number] => 15/471826 [patent_app_country] => US [patent_app_date] => 2017-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4682 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15471826 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11731040 [patent_doc_number] => 20170192483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-06 [patent_title] => 'POWER MANAGEMENT AND PRIORITY CHARGING ASSIGNMENTS' [patent_app_type] => utility [patent_app_number] => 15/462974 [patent_app_country] => US [patent_app_date] => 2017-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7585 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15462974 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13433207 [patent_doc_number] => 20180268146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-20 [patent_title] => SYSTEM AND METHOD TO ENFORCE THE SECURE BOOT POLICY OF A PLATFORM ON A VIRTUAL MACHINE [patent_app_type] => utility [patent_app_number] => 15/460501 [patent_app_country] => US [patent_app_date] => 2017-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7557 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15460501 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12140102 [patent_doc_number] => 20180018185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-18 [patent_title] => 'SECURITY DESIGN FOR A WAKE UP FRAME' [patent_app_type] => utility [patent_app_number] => 15/459960 [patent_app_country] => US [patent_app_date] => 2017-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8310 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15459960 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11716626 [patent_doc_number] => 20170185124 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'SYSTEM AND METHOD FOR AGGRESSIVELY BUDGETTING POWER ALLOCATION FOR AN INFORMATION HANDLING SYSTEM USING REDUNDANT CONFIGURATION OF POWER SUPPLY UNITS' [patent_app_type] => utility [patent_app_number] => 15/459435 [patent_app_country] => US [patent_app_date] => 2017-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 13769 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15459435 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12153579 [patent_doc_number] => 20180024843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'METHOD AND ASSOCIATED APPARATUS FOR PERFORMING WAKE-UP MANAGEMENT ON NETWORK DEVICES' [patent_app_type] => utility [patent_app_number] => 15/458987 [patent_app_country] => US [patent_app_date] => 2017-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6748 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15458987 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15730355 [patent_doc_number] => 10613605 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-04-07 [patent_title] => Service device, power supply control method, program, external power supply device, and server system [patent_app_type] => utility [patent_app_number] => 15/459377 [patent_app_country] => US [patent_app_date] => 2017-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 12077 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 321 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15459377 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15398665 [patent_doc_number] => 10539989 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-21 [patent_title] => Memory device alert of completion of internally self-timed power-up and reset operations [patent_app_type] => utility [patent_app_number] => 15/458122 [patent_app_country] => US [patent_app_date] => 2017-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8449 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15458122 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15168197 [patent_doc_number] => 10489596 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Configuring a trusted platform module [patent_app_type] => utility [patent_app_number] => 15/452162 [patent_app_country] => US [patent_app_date] => 2017-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5198 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15452162 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14850221 [patent_doc_number] => 10413817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-09-17 [patent_title] => Method and apparatus for determining energy availability for a haptic-enabled device and for conserving energy by selecting between a braking and non-braking mode [patent_app_type] => utility [patent_app_number] => 15/429382 [patent_app_country] => US [patent_app_date] => 2017-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11021 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15429382 [rel_patent_id] =>[rel_patent_doc_number] =>)