
Carson Gross
Examiner (ID: 17368, Phone: (571)270-7657 , Office: P/1746 )
| Most Active Art Unit | 1746 |
| Art Unit(s) | 1746, 1791 |
| Total Applications | 932 |
| Issued Applications | 645 |
| Pending Applications | 68 |
| Abandoned Applications | 232 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 9339005
[patent_doc_number] => 20140065787
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-06
[patent_title] => 'INTEGRATED CIRCUIT INCLUDING VERTICAL DIODE'
[patent_app_type] => utility
[patent_app_number] => 14/073919
[patent_app_country] => US
[patent_app_date] => 2013-11-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14073919
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/073919 | Integrated circuit including vertical diode | Nov 6, 2013 | Issued |
Array
(
[id] => 9575942
[patent_doc_number] => 08766359
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-07-01
[patent_title] => 'Lateral superjunction extended drain MOS transistor'
[patent_app_type] => utility
[patent_app_number] => 14/073472
[patent_app_country] => US
[patent_app_date] => 2013-11-06
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/073472 | Lateral superjunction extended drain MOS transistor | Nov 5, 2013 | Issued |
Array
(
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[patent_doc_number] => 09318614
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-04-19
[patent_title] => 'Self-aligned metal oxide TFT with reduced number of masks and with reduced power consumption'
[patent_app_type] => utility
[patent_app_number] => 14/071644
[patent_app_country] => US
[patent_app_date] => 2013-11-05
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/071644 | Self-aligned metal oxide TFT with reduced number of masks and with reduced power consumption | Nov 4, 2013 | Issued |
Array
(
[id] => 9334925
[patent_doc_number] => 20140061707
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-06
[patent_title] => 'SOLID STATE LIGHT SOURCES BASED ON THERMALLY CONDUCTIVE LUMINESCENT ELEMENTS CONTAINING INTERCONNECTS'
[patent_app_type] => utility
[patent_app_number] => 14/071609
[patent_app_country] => US
[patent_app_date] => 2013-11-04
[patent_effective_date] => 0000-00-00
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14071609
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/071609 | Solid state light sources based on thermally conductive luminescent elements containing interconnects | Nov 3, 2013 | Issued |
Array
(
[id] => 10898685
[patent_doc_number] => 08921905
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-30
[patent_title] => 'Solid-state imaging device'
[patent_app_type] => utility
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/053077 | Solid-state imaging device | Oct 13, 2013 | Issued |
Array
(
[id] => 9418763
[patent_doc_number] => 20140103413
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-04-17
[patent_title] => 'CMOS IMAGE SENSORS WITH PHOTOGATE STRUCTURES AND SENSING TRANSISTORS, OPERATION METHODS THEREOF, AND IMAGE PROCESSING SYSTEMS INCLUDING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 14/052024
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/052024 | CMOS IMAGE SENSORS WITH PHOTOGATE STRUCTURES AND SENSING TRANSISTORS, OPERATION METHODS THEREOF, AND IMAGE PROCESSING SYSTEMS INCLUDING THE SAME | Oct 10, 2013 | Abandoned |
Array
(
[id] => 11194224
[patent_doc_number] => 09425042
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[patent_kind] => B2
[patent_issue_date] => 2016-08-23
[patent_title] => 'Hybrid silicon germanium substrate for device fabrication'
[patent_app_type] => utility
[patent_app_number] => 14/050495
[patent_app_country] => US
[patent_app_date] => 2013-10-10
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[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14050495
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/050495 | Hybrid silicon germanium substrate for device fabrication | Oct 9, 2013 | Issued |
Array
(
[id] => 10518692
[patent_doc_number] => 09245746
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-01-26
[patent_title] => 'Semiconductor composite film with heterojunction and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 14/048971
[patent_app_country] => US
[patent_app_date] => 2013-10-08
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/048971 | Semiconductor composite film with heterojunction and manufacturing method thereof | Oct 7, 2013 | Issued |
Array
(
[id] => 10212238
[patent_doc_number] => 20150097230
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-04-09
[patent_title] => 'TRENCH GATE TRENCH FIELD PLATE VERTICAL MOSFET'
[patent_app_type] => utility
[patent_app_number] => 14/044915
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[patent_app_date] => 2013-10-03
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/044915 | Trench gate trench field plate vertical MOSFET | Oct 2, 2013 | Issued |
Array
(
[id] => 10971774
[patent_doc_number] => 20140374810
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-12-25
[patent_title] => 'SEMICONDUCTOR MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 14/045243
[patent_app_country] => US
[patent_app_date] => 2013-10-03
[patent_effective_date] => 0000-00-00
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/045243 | Semiconductor memory device | Oct 2, 2013 | Issued |
Array
(
[id] => 10212225
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[patent_kind] => A1
[patent_issue_date] => 2015-04-09
[patent_title] => 'SEMICONDUCTOR ATTENUATED FINS'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 14/045176 | SEMICONDUCTOR ATTENUATED FINS | Oct 2, 2013 | Abandoned |
Array
(
[id] => 10964737
[patent_doc_number] => 20140367769
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[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME'
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Array
(
[id] => 10916584
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Array
(
[id] => 10035552
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Array
(
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Array
(
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Array
(
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Array
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