Carson Gross

Array ( [id] => 8586273 [patent_doc_number] => 20130005095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-03 [patent_title] => 'ETSOI CMOS With Back Gates' [patent_app_type] => utility [patent_app_number] => 13/611656 [patent_app_country] => US [patent_app_date] => 2012-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 7045 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13611656 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9327935 [patent_doc_number] => 20140054717 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'INTEGRATION OF MULTIPLE THRESHOLD VOLTAGE DEVICES FOR COMPLEMENTARY METAL OXIDE SEMICONDUCTOR USING FULL METAL GATE' [patent_app_type] => utility [patent_app_number] => 13/594772 [patent_app_country] => US [patent_app_date] => 2012-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3815 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13594772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10858176 [patent_doc_number] => 08884380 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-11 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/592628 [patent_app_country] => US [patent_app_date] => 2012-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 34 [patent_no_of_words] => 9553 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13592628 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9662953 [patent_doc_number] => 08809937 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-19 [patent_title] => 'Semiconductor devices including device isolation structures and method of forming the same' [patent_app_type] => utility [patent_app_number] => 13/592822 [patent_app_country] => US [patent_app_date] => 2012-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 6407 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13592822 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10125441 [patent_doc_number] => 09159810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-13 [patent_title] => 'Doping a non-planar semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/592191 [patent_app_country] => US [patent_app_date] => 2012-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 17 [patent_no_of_words] => 6813 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13592191 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9100190 [patent_doc_number] => 08564069 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-10-22 [patent_title] => 'Field effect transistors with low body resistance and self-balanced body potential' [patent_app_type] => utility [patent_app_number] => 13/590212 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 3711 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590212 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8680821 [patent_doc_number] => 20130049105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/590665 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12611 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13590665 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9957856 [patent_doc_number] => 09006060 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-14 [patent_title] => 'N-type field effect transistors, arrays comprising N-type vertically-oriented transistors, methods of forming an N-type field effect transistor, and methods of forming an array comprising vertically-oriented N-type transistors' [patent_app_type] => utility [patent_app_number] => 13/591073 [patent_app_country] => US [patent_app_date] => 2012-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7083 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13591073 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8982640 [patent_doc_number] => 08513760 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-20 [patent_title] => 'Image sensor' [patent_app_type] => utility [patent_app_number] => 13/589858 [patent_app_country] => US [patent_app_date] => 2012-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4451 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13589858 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9273404 [patent_doc_number] => 08637335 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-01-28 [patent_title] => 'Photonic modulator with a semiconductor contact' [patent_app_type] => utility [patent_app_number] => 13/586187 [patent_app_country] => US [patent_app_date] => 2012-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 27 [patent_no_of_words] => 10329 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13586187 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9441417 [patent_doc_number] => 08710530 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Light emitted diode' [patent_app_type] => utility [patent_app_number] => 13/572209 [patent_app_country] => US [patent_app_date] => 2012-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3006 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13572209 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9127690 [patent_doc_number] => 08575641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-05 [patent_title] => 'Solid state light sources based on thermally conductive luminescent elements containing interconnects' [patent_app_type] => utility [patent_app_number] => 13/572608 [patent_app_country] => US [patent_app_date] => 2012-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 47 [patent_no_of_words] => 18639 [patent_no_of_claims] => 46 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13572608 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9850156 [patent_doc_number] => 08951885 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-10 [patent_title] => 'Insulation wall between transistors on SOI' [patent_app_type] => utility [patent_app_number] => 13/571603 [patent_app_country] => US [patent_app_date] => 2012-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 16 [patent_no_of_words] => 2603 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13571603 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9303773 [patent_doc_number] => 20140042447 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-13 [patent_title] => 'METHOD AND SYSTEM FOR GALLIUM NITRIDE ELECTRONIC DEVICES USING ENGINEERED SUBSTRATES' [patent_app_type] => utility [patent_app_number] => 13/572408 [patent_app_country] => US [patent_app_date] => 2012-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6234 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13572408 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9250694 [patent_doc_number] => 08614476 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-12-24 [patent_title] => 'Nonvolatile memory devices and fabricating methods thereof' [patent_app_type] => utility [patent_app_number] => 13/564992 [patent_app_country] => US [patent_app_date] => 2012-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 8562 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13564992 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9167137 [patent_doc_number] => 08592817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-26 [patent_title] => 'Self-aligned metal oxide TFT with reduced number of masks' [patent_app_type] => utility [patent_app_number] => 13/564746 [patent_app_country] => US [patent_app_date] => 2012-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 10 [patent_no_of_words] => 5285 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13564746 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8647185 [patent_doc_number] => 20130032915 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-07 [patent_title] => 'SOLID STATE IMAGING DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/564382 [patent_app_country] => US [patent_app_date] => 2012-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6337 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13564382 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10845100 [patent_doc_number] => 08872280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-10-28 [patent_title] => 'Non-planar FET and manufacturing method thereof' [patent_app_type] => utility [patent_app_number] => 13/562322 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 2907 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13562322 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9291470 [patent_doc_number] => 20140035104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-06 [patent_title] => 'GERMANIUM ON INSULATOR APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/563222 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3067 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13563222 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9183790 [patent_doc_number] => 08623722 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-01-07 [patent_title] => 'Methods of making JFET devices with pin gate stacks' [patent_app_type] => utility [patent_app_number] => 13/561901 [patent_app_country] => US [patent_app_date] => 2012-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 6411 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13561901 [rel_patent_id] =>[rel_patent_doc_number] =>)