Search

Cassandra F. Cox

Examiner (ID: 13913, Phone: (571)272-1741 , Office: P/2842 )

Most Active Art Unit
2816
Art Unit(s)
2842, 2816, 2849, 2836
Total Applications
2134
Issued Applications
1986
Pending Applications
78
Abandoned Applications
84

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16264293 [patent_doc_number] => 10755734 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-25 [patent_title] => Multi-signal realignment for changing sampling clock [patent_app_type] => utility [patent_app_number] => 16/570785 [patent_app_country] => US [patent_app_date] => 2019-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 5875 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16570785 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/570785
Multi-signal realignment for changing sampling clock Sep 12, 2019 Issued
Array ( [id] => 15271217 [patent_doc_number] => 20190384343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-19 [patent_title] => LOW-VOLTAGE REFERENCE CURRENT CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/557808 [patent_app_country] => US [patent_app_date] => 2019-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3233 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16557808 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/557808
Low-voltage reference current circuit Aug 29, 2019 Issued
Array ( [id] => 17498773 [patent_doc_number] => 11287474 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Scan flip-flop and scan test circuit including the same [patent_app_type] => utility [patent_app_number] => 16/552109 [patent_app_country] => US [patent_app_date] => 2019-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 12761 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16552109 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/552109
Scan flip-flop and scan test circuit including the same Aug 26, 2019 Issued
Array ( [id] => 15119711 [patent_doc_number] => 20190346488 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => DISCRETE INPUT DETERMINING CIRCUIT AND METHOD [patent_app_type] => utility [patent_app_number] => 16/522839 [patent_app_country] => US [patent_app_date] => 2019-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2309 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16522839 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/522839
Discrete input determining circuit and method Jul 25, 2019 Issued
Array ( [id] => 15439451 [patent_doc_number] => 20200033909 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => ZERO OFFSET CLOCK DISTRIBUTION [patent_app_type] => utility [patent_app_number] => 16/521217 [patent_app_country] => US [patent_app_date] => 2019-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2821 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16521217 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/521217
Zero offset clock distribution Jul 23, 2019 Issued
Array ( [id] => 17145962 [patent_doc_number] => 20210313975 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-07 [patent_title] => BI-DIRECTIONAL ADAPTIVE CLOCKING CIRCUIT SUPPORTING A WIDE FREQUENCY RANGE [patent_app_type] => utility [patent_app_number] => 16/957724 [patent_app_country] => US [patent_app_date] => 2019-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5363 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 243 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16957724 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/957724
Bi-directional adaptive clocking circuit supporting a wide frequency range Jul 8, 2019 Issued
Array ( [id] => 15124695 [patent_doc_number] => 20190348981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => SEMICONDUCTOR APPARATUS INCLUDING A POWER GATING CIRCUIT [patent_app_type] => utility [patent_app_number] => 16/503101 [patent_app_country] => US [patent_app_date] => 2019-07-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7260 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16503101 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/503101
Semiconductor apparatus including a power gating circuit Jul 2, 2019 Issued
Array ( [id] => 16339822 [patent_doc_number] => 10790794 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-29 [patent_title] => Methods and apparatus for an interface [patent_app_type] => utility [patent_app_number] => 16/459849 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3902 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16459849 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/459849
Methods and apparatus for an interface Jul 1, 2019 Issued
Array ( [id] => 16646230 [patent_doc_number] => 10924102 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-02-16 [patent_title] => Method for driving a transistor device and electronic circuit [patent_app_type] => utility [patent_app_number] => 16/460153 [patent_app_country] => US [patent_app_date] => 2019-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 36 [patent_no_of_words] => 11232 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16460153 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/460153
Method for driving a transistor device and electronic circuit Jul 1, 2019 Issued
Array ( [id] => 16082503 [patent_doc_number] => 20200195238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-06-18 [patent_title] => SYNCHRONIZER WITH CONTROLLED METASTABILITY CHARACTERISTICS [patent_app_type] => utility [patent_app_number] => 16/458239 [patent_app_country] => US [patent_app_date] => 2019-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9212 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16458239 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/458239
Synchronizer with controlled metastability characteristics Jun 30, 2019 Issued
Array ( [id] => 16294191 [patent_doc_number] => 10771049 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-08 [patent_title] => Control circuit and method for avoiding reverse recovery of a power transistor [patent_app_type] => utility [patent_app_number] => 16/456233 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 6682 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456233 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/456233
Control circuit and method for avoiding reverse recovery of a power transistor Jun 27, 2019 Issued
Array ( [id] => 15235571 [patent_doc_number] => 10505519 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-10 [patent_title] => Dynamic comparator [patent_app_type] => utility [patent_app_number] => 16/456130 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 271 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456130 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/456130
Dynamic comparator Jun 27, 2019 Issued
Array ( [id] => 15986167 [patent_doc_number] => 10673426 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-02 [patent_title] => Switch bootstrap charging circuit suitable for gate drive circuit of GaN power device [patent_app_type] => utility [patent_app_number] => 16/455803 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 12747 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 431 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455803 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455803
Switch bootstrap charging circuit suitable for gate drive circuit of GaN power device Jun 27, 2019 Issued
Array ( [id] => 15389887 [patent_doc_number] => 10536153 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-01-14 [patent_title] => Signal generator [patent_app_type] => utility [patent_app_number] => 16/456606 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 4395 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456606 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/456606
Signal generator Jun 27, 2019 Issued
Array ( [id] => 16774633 [patent_doc_number] => 10985759 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Apparatuses and methods involving a segmented source-series terminated line driver [patent_app_type] => utility [patent_app_number] => 16/456236 [patent_app_country] => US [patent_app_date] => 2019-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7577 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16456236 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/456236
Apparatuses and methods involving a segmented source-series terminated line driver Jun 27, 2019 Issued
Array ( [id] => 17014413 [patent_doc_number] => 11084033 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-10 [patent_title] => Drive circuit and drive method thereof, and panel and drive method thereof [patent_app_type] => utility [patent_app_number] => 16/455013 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 15007 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455013 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455013
Drive circuit and drive method thereof, and panel and drive method thereof Jun 26, 2019 Issued
Array ( [id] => 16545925 [patent_doc_number] => 20200412340 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-31 [patent_title] => On-Chip Balun [patent_app_type] => utility [patent_app_number] => 16/455651 [patent_app_country] => US [patent_app_date] => 2019-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3303 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16455651 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/455651
On-chip balun Jun 26, 2019 Issued
Array ( [id] => 16247897 [patent_doc_number] => 10747250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-08-18 [patent_title] => Integrated circuit with adaptability to a process-voltage-temperature (PVT) variation [patent_app_type] => utility [patent_app_number] => 16/453149 [patent_app_country] => US [patent_app_date] => 2019-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 8280 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16453149 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/453149
Integrated circuit with adaptability to a process-voltage-temperature (PVT) variation Jun 25, 2019 Issued
Array ( [id] => 17179470 [patent_doc_number] => 11156709 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-26 [patent_title] => Phase measurement in a radar system [patent_app_type] => utility [patent_app_number] => 16/440211 [patent_app_country] => US [patent_app_date] => 2019-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 8156 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16440211 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/440211
Phase measurement in a radar system Jun 12, 2019 Issued
Array ( [id] => 16803797 [patent_doc_number] => 10998759 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-04 [patent_title] => Uninterruptible power supply with DC output [patent_app_type] => utility [patent_app_number] => 16/431069 [patent_app_country] => US [patent_app_date] => 2019-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 5256 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16431069 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/431069
Uninterruptible power supply with DC output Jun 3, 2019 Issued
Menu