Search

Cassandra F. Cox

Examiner (ID: 13913, Phone: (571)272-1741 , Office: P/2842 )

Most Active Art Unit
2816
Art Unit(s)
2842, 2816, 2849, 2836
Total Applications
2134
Issued Applications
1986
Pending Applications
78
Abandoned Applications
84

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19084176 [patent_doc_number] => 20240110977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => COMPARATOR TESTING CIRCUIT AND TESTING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/473299 [patent_app_country] => US [patent_app_date] => 2023-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6091 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18473299 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/473299
Comparator testing circuit and testing method thereof Sep 24, 2023 Issued
Array ( [id] => 19086903 [patent_doc_number] => 20240113704 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-04 [patent_title] => CIRCUIT AND METHOD FOR CONTROLLING A TRANSISTOR [patent_app_type] => utility [patent_app_number] => 18/371622 [patent_app_country] => US [patent_app_date] => 2023-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8437 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18371622 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/371622
Circuit and method for controlling a transistor Sep 21, 2023 Issued
Array ( [id] => 19219017 [patent_doc_number] => 20240183721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => RESISTANCE-BASED ON-CHIP TEMPERATURE SENSOR [patent_app_type] => utility [patent_app_number] => 18/468569 [patent_app_country] => US [patent_app_date] => 2023-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18468569 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/468569
RESISTANCE-BASED ON-CHIP TEMPERATURE SENSOR Sep 14, 2023 Pending
Array ( [id] => 19782081 [patent_doc_number] => 12231128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Frequency selective limiter having reduced spike leakage [patent_app_type] => utility [patent_app_number] => 18/462482 [patent_app_country] => US [patent_app_date] => 2023-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 6879 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18462482 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/462482
Frequency selective limiter having reduced spike leakage Sep 6, 2023 Issued
Array ( [id] => 19469138 [patent_doc_number] => 20240322808 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-26 [patent_title] => HIGH FREQUENCY SEMICONDUCTOR INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/243635 [patent_app_country] => US [patent_app_date] => 2023-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18243635 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/243635
High frequency semiconductor integrated circuit Sep 6, 2023 Issued
Array ( [id] => 19336244 [patent_doc_number] => 20240250674 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => SEMICONDUCTOR SYSTEMS WITH DATA CLOCK APPLIED [patent_app_type] => utility [patent_app_number] => 18/458415 [patent_app_country] => US [patent_app_date] => 2023-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7426 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -24 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458415 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/458415
SEMICONDUCTOR SYSTEMS WITH DATA CLOCK APPLIED Aug 29, 2023 Pending
Array ( [id] => 19453620 [patent_doc_number] => 20240313750 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => CLOCK SIGNAL SYNCHRONIZATION CIRCUIT, SEMICONDUCTOR MEMORY DEVICE INCLUDING CLOCK SIGNAL SYNCHRONIZATION CIRCUIT, AND METHOD OF OPERATING CLOCK SIGNAL SYNCHRONIZATION CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/239450 [patent_app_country] => US [patent_app_date] => 2023-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8240 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18239450 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/239450
Clock signal synchronization circuit, semiconductor memory device including clock signal synchronization circuit, and method of operating clock signal synchronization circuit Aug 28, 2023 Issued
Array ( [id] => 19980739 [patent_doc_number] => 12348230 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => All-digital duty cycle corrector and method for correcting duty cycle of output clock [patent_app_type] => utility [patent_app_number] => 18/236404 [patent_app_country] => US [patent_app_date] => 2023-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 0 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18236404 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/236404
All-digital duty cycle corrector and method for correcting duty cycle of output clock Aug 21, 2023 Issued
Array ( [id] => 19789085 [patent_doc_number] => 20250062764 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => BUFFER WITH REDUCED SHOOT-THROUGH CURRENT [patent_app_type] => utility [patent_app_number] => 18/450453 [patent_app_country] => US [patent_app_date] => 2023-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7167 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18450453 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/450453
Buffer with reduced shoot-through current Aug 15, 2023 Issued
Array ( [id] => 19357382 [patent_doc_number] => 12057847 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-08-06 [patent_title] => Clock generation circuit and semiconductor apparatus using the clock generation circuit [patent_app_type] => utility [patent_app_number] => 18/450654 [patent_app_country] => US [patent_app_date] => 2023-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 28100 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18450654 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/450654
Clock generation circuit and semiconductor apparatus using the clock generation circuit Aug 15, 2023 Issued
Array ( [id] => 20333336 [patent_doc_number] => 12463623 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-04 [patent_title] => Phase error compensation circuit and method for compensating phase error between reference clock and feedback clock [patent_app_type] => utility [patent_app_number] => 18/234346 [patent_app_country] => US [patent_app_date] => 2023-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4126 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18234346 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/234346
Phase error compensation circuit and method for compensating phase error between reference clock and feedback clock Aug 14, 2023 Issued
Array ( [id] => 20132754 [patent_doc_number] => 12375072 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Jitter cancellation circuit [patent_app_type] => utility [patent_app_number] => 18/364225 [patent_app_country] => US [patent_app_date] => 2023-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 17 [patent_no_of_words] => 3181 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364225 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/364225
Jitter cancellation circuit Aug 1, 2023 Issued
Array ( [id] => 19741821 [patent_doc_number] => 12218674 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-04 [patent_title] => Signal generating circuit and signal generating method [patent_app_type] => utility [patent_app_number] => 18/225463 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 21 [patent_no_of_words] => 5885 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18225463 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/225463
Signal generating circuit and signal generating method Jul 23, 2023 Issued
Array ( [id] => 19238204 [patent_doc_number] => 20240195399 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => DUTY CYCLE MONITORING METHOD AND APPARATUS FOR MEMORY INTERFACE [patent_app_type] => utility [patent_app_number] => 18/223101 [patent_app_country] => US [patent_app_date] => 2023-07-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5131 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18223101 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/223101
Duty cycle monitoring method and apparatus for memory interface Jul 17, 2023 Issued
Array ( [id] => 19544365 [patent_doc_number] => 20240361401 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => MULTIPLE STAGE FUSE CIRCUITRY FOR COUNTING FAILURE EVENTS [patent_app_type] => utility [patent_app_number] => 18/222873 [patent_app_country] => US [patent_app_date] => 2023-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16172 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18222873 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/222873
Multiple stage fuse circuitry for counting failure events Jul 16, 2023 Issued
Array ( [id] => 19782080 [patent_doc_number] => 12231127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => System for signal propagation and method of operating the same [patent_app_type] => utility [patent_app_number] => 18/352286 [patent_app_country] => US [patent_app_date] => 2023-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 17 [patent_no_of_words] => 8359 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18352286 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/352286
System for signal propagation and method of operating the same Jul 13, 2023 Issued
Array ( [id] => 18758292 [patent_doc_number] => 20230361763 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => PHASE INTERPOLATOR CIRCUIT, RECEPTION CIRCUIT, AND SEMICONDUCTOR INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/351902 [patent_app_country] => US [patent_app_date] => 2023-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17617 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18351902 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/351902
Phase interpolator circuit, reception circuit, and semiconductor integrated circuit Jul 12, 2023 Issued
Array ( [id] => 20111927 [patent_doc_number] => 12362667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => System and method having a switching converter and self-switched charge pump configuration [patent_app_type] => utility [patent_app_number] => 18/350346 [patent_app_country] => US [patent_app_date] => 2023-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18350346 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/350346
System and method having a switching converter and self-switched charge pump configuration Jul 10, 2023 Issued
Array ( [id] => 19222298 [patent_doc_number] => 20240187002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/350606 [patent_app_country] => US [patent_app_date] => 2023-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14396 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18350606 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/350606
Semiconductor device Jul 10, 2023 Issued
Array ( [id] => 18959804 [patent_doc_number] => 20240048131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => CONTROL CIRCUIT FOR A SWITCHING STAGE OF AN ELECTRONIC CONVERTER AND CORRESPONDING CONVERTER DEVICE [patent_app_type] => utility [patent_app_number] => 18/350380 [patent_app_country] => US [patent_app_date] => 2023-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6788 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 543 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18350380 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/350380
Control circuit for a switching stage of an electronic converter and corresponding converter device Jul 10, 2023 Issued
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