Cassandra F. Cox

Array ( [id] => 19047261 [patent_doc_number] => 11936386 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-19 [patent_title] => Clock transfer circuit including a semiconductor device for compensating delay fluctuation [patent_app_type] => utility [patent_app_number] => 18/298297 [patent_app_country] => US [patent_app_date] => 2023-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4183 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18298297 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18697195 [patent_doc_number] => 20230327654 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-12 [patent_title] => PULSE-WIDTH MODULATION CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/131766 [patent_app_country] => US [patent_app_date] => 2023-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1633 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18131766 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19147251 [patent_doc_number] => 20240146306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => BOOTSTRAPPED SWITCH [patent_app_type] => utility [patent_app_number] => 18/296649 [patent_app_country] => US [patent_app_date] => 2023-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16460 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18296649 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19611355 [patent_doc_number] => 12160241 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-03 [patent_title] => Frequency doubler with duty cycle estimator, duty cycle corrector, and T/4 delay generator [patent_app_type] => utility [patent_app_number] => 18/295376 [patent_app_country] => US [patent_app_date] => 2023-04-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4464 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18295376 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19782079 [patent_doc_number] => 12231126 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2025-02-18 [patent_title] => System and method for generating sampling strobe for sampling an input signal [patent_app_type] => utility [patent_app_number] => 18/127771 [patent_app_country] => US [patent_app_date] => 2023-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 7064 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18127771 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19277731 [patent_doc_number] => 12027864 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Utility energy cloud exchange [patent_app_type] => utility [patent_app_number] => 18/191962 [patent_app_country] => US [patent_app_date] => 2023-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 16 [patent_no_of_words] => 10915 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18191962 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18744043 [patent_doc_number] => 20230353031 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => DIGITAL FEEDBACK BASED ADAPTIVE DELAY TIME CONTROL METHOD AND APPARATUS FOR HIGH EFFICIENCY ACTIVE RECTIFIER [patent_app_type] => utility [patent_app_number] => 18/190509 [patent_app_country] => US [patent_app_date] => 2023-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4491 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18190509 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18680927 [patent_doc_number] => 20230318590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => METHOD AND SYSTEM OF CALIBRATING A CLOCK SIGNAL [patent_app_type] => utility [patent_app_number] => 18/187379 [patent_app_country] => US [patent_app_date] => 2023-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8052 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18187379 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18515281 [patent_doc_number] => 20230231563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => DUTY-CYCLE CORRECTOR PHASE SHIFT CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/186676 [patent_app_country] => US [patent_app_date] => 2023-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14371 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18186676 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19460575 [patent_doc_number] => 12101093 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-24 [patent_title] => Electronic circuitry and control system [patent_app_type] => utility [patent_app_number] => 18/185071 [patent_app_country] => US [patent_app_date] => 2023-03-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5812 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18185071 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18680914 [patent_doc_number] => 20230318577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => PHASE SHIFTER FOR LINEARLY SHIFTING PHASE OF INPUT SIGNAL BASED ON PHASE CONTROL SIGNALS [patent_app_type] => utility [patent_app_number] => 18/182571 [patent_app_country] => US [patent_app_date] => 2023-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6715 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 328 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18182571 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19965409 [patent_doc_number] => 12334933 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-17 [patent_title] => Power management integrated circuit [patent_app_type] => utility [patent_app_number] => 18/119995 [patent_app_country] => US [patent_app_date] => 2023-03-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 852 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18119995 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19039065 [patent_doc_number] => 20240088880 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => ELECTRONIC CIRCUITRY AND POWER CONVERTER [patent_app_type] => utility [patent_app_number] => 18/180582 [patent_app_country] => US [patent_app_date] => 2023-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12218 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18180582 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19008711 [patent_doc_number] => 20240072782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => DIGITAL DROOP DETECTOR, SEMICONDUCTOR DEVICE INCLUDING THE SAME, AND CALIBRATION METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/176371 [patent_app_country] => US [patent_app_date] => 2023-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8120 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18176371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19277942 [patent_doc_number] => 12028076 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-07-02 [patent_title] => Circuit and method for determining a delay of a delay circuit [patent_app_type] => utility [patent_app_number] => 18/174823 [patent_app_country] => US [patent_app_date] => 2023-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6193 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18174823 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20132771 [patent_doc_number] => 12375089 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Reducing duty cycle mismatch of clock signals for clock tracking circuits [patent_app_type] => utility [patent_app_number] => 18/167716 [patent_app_country] => US [patent_app_date] => 2023-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 20 [patent_no_of_words] => 10962 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18167716 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18883716 [patent_doc_number] => 20240007085 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => DUTY CYCLE CORRECTION CIRCUIT AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/106915 [patent_app_country] => US [patent_app_date] => 2023-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7636 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18106915 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19971090 [patent_doc_number] => 12339700 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-06-24 [patent_title] => Transient current-mode signaling scheme for on-chip interconnect fabrics [patent_app_type] => utility [patent_app_number] => 18/164590 [patent_app_country] => US [patent_app_date] => 2023-02-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 9223 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18164590 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18380493 [patent_doc_number] => 20230155583 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => DIGITALLY CONTROLLED DELAY LINE CIRCUIT AND METHOD [patent_app_type] => utility [patent_app_number] => 18/155906 [patent_app_country] => US [patent_app_date] => 2023-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14119 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155906 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18409530 [patent_doc_number] => 20230170883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => SYNCHRONIZING PULSE-WIDTH MODULATION CONTROL [patent_app_type] => utility [patent_app_number] => 18/155232 [patent_app_country] => US [patent_app_date] => 2023-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4507 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155232 [rel_patent_id] =>[rel_patent_doc_number] =>)