Search

Cassandra F. Cox

Examiner (ID: 13913, Phone: (571)272-1741 , Office: P/2842 )

Most Active Art Unit
2816
Art Unit(s)
2842, 2816, 2849, 2836
Total Applications
2134
Issued Applications
1986
Pending Applications
78
Abandoned Applications
84

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19277940 [patent_doc_number] => 12028074 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Pulse width distortion correction [patent_app_type] => utility [patent_app_number] => 18/153383 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5673 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153383 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/153383
Pulse width distortion correction Jan 11, 2023 Issued
Array ( [id] => 18515264 [patent_doc_number] => 20230231546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-07-20 [patent_title] => TIME INTERLEAVING CIRCUIT HAVING GLITCH MITIGATION [patent_app_type] => utility [patent_app_number] => 18/151332 [patent_app_country] => US [patent_app_date] => 2023-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4851 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18151332 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/151332
Time interleaving circuit having glitch mitigation Jan 5, 2023 Issued
Array ( [id] => 19286691 [patent_doc_number] => 20240223171 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-04 [patent_title] => Controlling Duty Cycle Distortion with Digital Circuit [patent_app_type] => utility [patent_app_number] => 18/149009 [patent_app_country] => US [patent_app_date] => 2022-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14396 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149009 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/149009
Controlling duty cycle distortion with digital circuit Dec 29, 2022 Issued
Array ( [id] => 19918990 [patent_doc_number] => 12294376 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Differential clock duty cycle corrector circuits [patent_app_type] => utility [patent_app_number] => 18/091114 [patent_app_country] => US [patent_app_date] => 2022-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4664 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18091114 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/091114
Differential clock duty cycle corrector circuits Dec 28, 2022 Issued
Array ( [id] => 19655097 [patent_doc_number] => 12176907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Systems for and methods of jitter reduction [patent_app_type] => utility [patent_app_number] => 18/146677 [patent_app_country] => US [patent_app_date] => 2022-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 8651 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18146677 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/146677
Systems for and methods of jitter reduction Dec 26, 2022 Issued
Array ( [id] => 19918993 [patent_doc_number] => 12294379 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Clock generating circuit and semiconductor apparatus using the same [patent_app_type] => utility [patent_app_number] => 18/084956 [patent_app_country] => US [patent_app_date] => 2022-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3564 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18084956 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/084956
Clock generating circuit and semiconductor apparatus using the same Dec 19, 2022 Issued
Array ( [id] => 18409537 [patent_doc_number] => 20230170890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => PHASE INTERPOLATION DEVICE AND MULTI-PHASE CLOCK GENERATION DEVICE [patent_app_type] => utility [patent_app_number] => 18/071794 [patent_app_country] => US [patent_app_date] => 2022-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6034 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 263 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18071794 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/071794
Phase interpolation device and multi-phase clock generation device Nov 29, 2022 Issued
Array ( [id] => 20783710 [patent_doc_number] => 20260171913 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-06-18 [patent_title] => ELECTRIC DEVICE INCLUDING A DRIVER CIRCUIT FOR SUPPLYING A CONTROL INPUT OF A CONTROLLED FIRST SEMICONDUCTOR SWITCH [patent_app_type] => utility [patent_app_number] => 18/719399 [patent_app_country] => US [patent_app_date] => 2022-11-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -25 [patent_words_short_claim] => 4 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18719399 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/719399
ELECTRIC DEVICE INCLUDING A DRIVER CIRCUIT FOR SUPPLYING A CONTROL INPUT OF A CONTROLLED FIRST SEMICONDUCTOR SWITCH Nov 27, 2022 Pending
Array ( [id] => 18440829 [patent_doc_number] => 20230188125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => CLOCK DATA RECOVERY CIRCUIT OF DISPLAY AND CLOCK RECOVERY CIRCUIT THEREOF [patent_app_type] => utility [patent_app_number] => 17/992744 [patent_app_country] => US [patent_app_date] => 2022-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4957 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17992744 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/992744
Clock data recovery circuit of display and clock recovery circuit thereof Nov 21, 2022 Issued
Array ( [id] => 18395533 [patent_doc_number] => 20230163754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-25 [patent_title] => WOBULATED SIGNAL GENERATOR [patent_app_type] => utility [patent_app_number] => 18/056153 [patent_app_country] => US [patent_app_date] => 2022-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10106 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18056153 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/056153
Wobulated signal generator Nov 15, 2022 Issued
Array ( [id] => 19173865 [patent_doc_number] => 20240159839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => Voltage Sampling Apparatus and Method [patent_app_type] => utility [patent_app_number] => 18/055864 [patent_app_country] => US [patent_app_date] => 2022-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7767 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18055864 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/055864
Voltage sampling apparatus and method Nov 15, 2022 Issued
Array ( [id] => 18713528 [patent_doc_number] => 20230336164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => DUTY DETECTION CIRCUIT, A DUTY CORRECTION CIRCUIT, AND A SEMICONDUCTOR APPARATUS USING THE DUTY CORRECTION CIRCUIT [patent_app_type] => utility [patent_app_number] => 17/983134 [patent_app_country] => US [patent_app_date] => 2022-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12598 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17983134 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/983134
Duty detection circuit, a duty correction circuit, and a semiconductor apparatus using the duty correction circuit Nov 7, 2022 Issued
Array ( [id] => 18193003 [patent_doc_number] => 20230046522 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => DUTY CYCLE DETECTION CIRCUIT AND DUTY CYCLE CORRECTION CIRCUIT INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/979583 [patent_app_country] => US [patent_app_date] => 2022-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6457 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17979583 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/979583
Duty cycle detection circuit and duty cycle correction circuit including the same Nov 1, 2022 Issued
Array ( [id] => 19199591 [patent_doc_number] => 11996848 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-05-28 [patent_title] => Compensation for clock frequency modulation [patent_app_type] => utility [patent_app_number] => 17/979622 [patent_app_country] => US [patent_app_date] => 2022-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5288 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17979622 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/979622
Compensation for clock frequency modulation Nov 1, 2022 Issued
Array ( [id] => 19080036 [patent_doc_number] => 11949421 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-04-02 [patent_title] => Two-step duty-cycle correction for high-speed clocks in communications systems [patent_app_type] => utility [patent_app_number] => 17/976720 [patent_app_country] => US [patent_app_date] => 2022-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6810 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17976720 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/976720
Two-step duty-cycle correction for high-speed clocks in communications systems Oct 27, 2022 Issued
Array ( [id] => 19445170 [patent_doc_number] => 12095467 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-09-17 [patent_title] => Compact digital delay locked loop [patent_app_type] => utility [patent_app_number] => 17/974460 [patent_app_country] => US [patent_app_date] => 2022-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 12335 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17974460 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/974460
Compact digital delay locked loop Oct 25, 2022 Issued
Array ( [id] => 19028260 [patent_doc_number] => 11927612 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2024-03-12 [patent_title] => Digital droop detector [patent_app_type] => utility [patent_app_number] => 18/048018 [patent_app_country] => US [patent_app_date] => 2022-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 3281 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18048018 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/048018
Digital droop detector Oct 18, 2022 Issued
Array ( [id] => 18164965 [patent_doc_number] => 20230031562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/968496 [patent_app_country] => US [patent_app_date] => 2022-10-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10118 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17968496 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/968496
Semiconductor device Oct 17, 2022 Issued
Array ( [id] => 18624393 [patent_doc_number] => 11757455 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2023-09-12 [patent_title] => Low jitter delay cell [patent_app_type] => utility [patent_app_number] => 18/046283 [patent_app_country] => US [patent_app_date] => 2022-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4454 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18046283 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/046283
Low jitter delay cell Oct 12, 2022 Issued
Array ( [id] => 19635371 [patent_doc_number] => 20240413820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-12 [patent_title] => HIGH-SIDE DRIVER CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/699312 [patent_app_country] => US [patent_app_date] => 2022-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6142 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18699312 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/699312
HIGH-SIDE DRIVER CIRCUIT Oct 10, 2022 Abandoned
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