Search

Cassey D. Bauer

Examiner (ID: 11652, Phone: (571)270-7113 , Office: P/3744 )

Most Active Art Unit
3763
Art Unit(s)
3744, 3763, 3784
Total Applications
1073
Issued Applications
757
Pending Applications
106
Abandoned Applications
237

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19559641 [patent_doc_number] => 20240371433 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-07 [patent_title] => MEMORY CIRCUITS, MEMORY STRUCTURES, AND METHODS FOR FABRICATING A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 18/772117 [patent_app_country] => US [patent_app_date] => 2024-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9320 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18772117 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/772117
MEMORY CIRCUITS, MEMORY STRUCTURES, AND METHODS FOR FABRICATING A MEMORY DEVICE Jul 12, 2024 Pending
Array ( [id] => 19546126 [patent_doc_number] => 20240363162 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => Methods for Reading Resistive States of Resistive Change Elements [patent_app_type] => utility [patent_app_number] => 18/770397 [patent_app_country] => US [patent_app_date] => 2024-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 75208 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18770397 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/770397
Methods for Reading Resistive States of Resistive Change Elements Jul 10, 2024 Abandoned
Array ( [id] => 19531486 [patent_doc_number] => 20240355388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => MEMORY CELL INCLUDING PROGRAMMABLE RESISTORS WITH TRANSISTOR COMPONENTS [patent_app_type] => utility [patent_app_number] => 18/758901 [patent_app_country] => US [patent_app_date] => 2024-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8225 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18758901 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/758901
Memory cell including programmable resistors with transistor components Jun 27, 2024 Issued
Array ( [id] => 19531486 [patent_doc_number] => 20240355388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-24 [patent_title] => MEMORY CELL INCLUDING PROGRAMMABLE RESISTORS WITH TRANSISTOR COMPONENTS [patent_app_type] => utility [patent_app_number] => 18/758901 [patent_app_country] => US [patent_app_date] => 2024-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8225 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18758901 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/758901
Memory cell including programmable resistors with transistor components Jun 27, 2024 Issued
Array ( [id] => 19893046 [patent_doc_number] => 20250118358 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES [patent_app_type] => utility [patent_app_number] => 18/746339 [patent_app_country] => US [patent_app_date] => 2024-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12919 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18746339 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/746339
APPARATUSES AND METHODS FOR SINGLE AND MULTI MEMORY CELL ARCHITECTURES Jun 17, 2024 Pending
Array ( [id] => 20222745 [patent_doc_number] => 20250285676 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-11 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/731731 [patent_app_country] => US [patent_app_date] => 2024-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2564 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18731731 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/731731
SEMICONDUCTOR DEVICE Jun 2, 2024 Pending
Array ( [id] => 19618915 [patent_doc_number] => 20240404595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-12-05 [patent_title] => SENSE AMPLIFIER CIRCUIT, CORRESPONDING MEMORY DEVICE AND METHOD OF OPERATION [patent_app_type] => utility [patent_app_number] => 18/676630 [patent_app_country] => US [patent_app_date] => 2024-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6492 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18676630 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/676630
SENSE AMPLIFIER CIRCUIT, CORRESPONDING MEMORY DEVICE AND METHOD OF OPERATION May 28, 2024 Pending
Array ( [id] => 19450926 [patent_doc_number] => 20240311056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => MEMORY CONTROLLER AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/677655 [patent_app_country] => US [patent_app_date] => 2024-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 46257 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18677655 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/677655
Memory controller and operating method thereof May 28, 2024 Issued
Array ( [id] => 19450926 [patent_doc_number] => 20240311056 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => MEMORY CONTROLLER AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/677655 [patent_app_country] => US [patent_app_date] => 2024-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 46257 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18677655 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/677655
Memory controller and operating method thereof May 28, 2024 Issued
Array ( [id] => 19604788 [patent_doc_number] => 20240395668 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => MEMORY ARRAY CIRCUIT [patent_app_type] => utility [patent_app_number] => 18/673345 [patent_app_country] => US [patent_app_date] => 2024-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10644 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18673345 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/673345
MEMORY ARRAY CIRCUIT May 23, 2024 Pending
Array ( [id] => 19452413 [patent_doc_number] => 20240312543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => ONE-TIME-PROGRAMMABLE MEMORY [patent_app_type] => utility [patent_app_number] => 18/672623 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6196 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672623 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/672623
ONE-TIME-PROGRAMMABLE MEMORY May 22, 2024 Pending
Array ( [id] => 19604430 [patent_doc_number] => 20240395310 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => SIGNAL SKEW IN SOURCE-SYNCHRONOUS SYSTEM [patent_app_type] => utility [patent_app_number] => 18/673246 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6779 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18673246 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/673246
Signal skew in source-synchronous system May 22, 2024 Issued
Array ( [id] => 19452413 [patent_doc_number] => 20240312543 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-19 [patent_title] => ONE-TIME-PROGRAMMABLE MEMORY [patent_app_type] => utility [patent_app_number] => 18/672623 [patent_app_country] => US [patent_app_date] => 2024-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6196 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18672623 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/672623
ONE-TIME-PROGRAMMABLE MEMORY May 22, 2024 Pending
Array ( [id] => 19435733 [patent_doc_number] => 20240304231 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-12 [patent_title] => MEMORY DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/657376 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 40439 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18657376 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/657376
Memory device and electronic device May 6, 2024 Issued
Array ( [id] => 19406878 [patent_doc_number] => 20240290389 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => IN-LINE PROGRAMMING ADJUSTMENT OF A MEMORY CELL IN A MEMORY SUB-SYSTEM [patent_app_type] => utility [patent_app_number] => 18/654697 [patent_app_country] => US [patent_app_date] => 2024-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28968 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18654697 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/654697
In-line programming adjustment of a memory cell in a memory sub-system May 2, 2024 Issued
Array ( [id] => 19420764 [patent_doc_number] => 20240296888 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-09-05 [patent_title] => SEMICONDUCTOR STORAGE DEVICE [patent_app_type] => utility [patent_app_number] => 18/653785 [patent_app_country] => US [patent_app_date] => 2024-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13769 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653785 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/653785
Semiconductor storage device May 1, 2024 Issued
Array ( [id] => 19515419 [patent_doc_number] => 20240347105 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/635268 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6010 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635268 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635268
RANDOM ACCESS MEMORY AND METHOD OF FABRICATING THE SAME Apr 14, 2024 Pending
Array ( [id] => 19517795 [patent_doc_number] => 20240349481 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-17 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING MEMORY ELEMENT [patent_app_type] => utility [patent_app_number] => 18/619444 [patent_app_country] => US [patent_app_date] => 2024-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6960 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 273 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18619444 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/619444
SEMICONDUCTOR DEVICE INCLUDING MEMORY ELEMENT Mar 27, 2024 Pending
Array ( [id] => 19305215 [patent_doc_number] => 20240233795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => MEMORY CIRCUIT AND WRITE METHOD [patent_app_type] => utility [patent_app_number] => 18/615398 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7902 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615398 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/615398
MEMORY CIRCUIT AND WRITE METHOD Mar 24, 2024 Pending
Array ( [id] => 19305215 [patent_doc_number] => 20240233795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => MEMORY CIRCUIT AND WRITE METHOD [patent_app_type] => utility [patent_app_number] => 18/615398 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7902 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615398 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/615398
MEMORY CIRCUIT AND WRITE METHOD Mar 24, 2024 Pending
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