Search

Cassey D. Bauer

Examiner (ID: 11652, Phone: (571)270-7113 , Office: P/3744 )

Most Active Art Unit
3763
Art Unit(s)
3744, 3763, 3784
Total Applications
1073
Issued Applications
757
Pending Applications
106
Abandoned Applications
237

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18113036 [patent_doc_number] => 20230005916 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => THIN FILM TRANSISTOR DECK SELECTION IN A MEMORY DEVICE [patent_app_type] => utility [patent_app_number] => 17/863970 [patent_app_country] => US [patent_app_date] => 2022-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24263 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17863970 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/863970
Thin film transistor deck selection in a memory device Jul 12, 2022 Issued
Array ( [id] => 17985731 [patent_doc_number] => 20220351768 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-03 [patent_title] => FERROELECTRIC DEVICES AND FERROELECTRIC MEMORY CELLS [patent_app_type] => utility [patent_app_number] => 17/812132 [patent_app_country] => US [patent_app_date] => 2022-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7370 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17812132 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/812132
Ferroelectric devices and ferroelectric memory cells Jul 11, 2022 Issued
Array ( [id] => 18170073 [patent_doc_number] => 20230036684 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => BIT LINE SENSE AMPLIFIER AND SEMICONDUCTOR MEMORY APPARATUS USING THE SAME [patent_app_type] => utility [patent_app_number] => 17/859153 [patent_app_country] => US [patent_app_date] => 2022-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7589 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17859153 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/859153
Bit line sense amplifier and semiconductor memory apparatus using the same Jul 6, 2022 Issued
Array ( [id] => 17949011 [patent_doc_number] => 20220336030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => Multi-Fuse Memory Cell Circuit and Method [patent_app_type] => utility [patent_app_number] => 17/855876 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4075 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855876 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855876
Multi-fuse memory cell circuit and method Jun 30, 2022 Issued
Array ( [id] => 19494097 [patent_doc_number] => 12112818 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-08 [patent_title] => Scan chain compression for testing memory of a system on a chip [patent_app_type] => utility [patent_app_number] => 17/856744 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 12075 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856744 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/856744
Scan chain compression for testing memory of a system on a chip Jun 30, 2022 Issued
Array ( [id] => 18377943 [patent_doc_number] => 20230153030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-18 [patent_title] => STORAGE DEVICE AND OPERATING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/810067 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6969 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17810067 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/810067
Storage device and operating method thereof Jun 29, 2022 Issued
Array ( [id] => 18442214 [patent_doc_number] => 20230189510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/854130 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10221 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854130 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/854130
SEMICONDUCTOR DEVICE Jun 29, 2022 Pending
Array ( [id] => 18442214 [patent_doc_number] => 20230189510 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-15 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/854130 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10221 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854130 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/854130
SEMICONDUCTOR DEVICE Jun 29, 2022 Pending
Array ( [id] => 18585723 [patent_doc_number] => 20230267987 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-24 [patent_title] => METHOD AND APPARATUS FOR INTENSIFYING CURRENT LEAKAGE BETWEEN ADJACENT MEMORY CELLS, AND METHOD AND APPARATUS FOR CURRENT LEAKAGE DETECTION [patent_app_type] => utility [patent_app_number] => 17/809551 [patent_app_country] => US [patent_app_date] => 2022-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6278 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809551 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/809551
Method and apparatus for intensifying current leakage between adjacent memory cells, and method and apparatus for current leakage detection Jun 27, 2022 Issued
Array ( [id] => 17932966 [patent_doc_number] => 20220328092 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => MEMORY DEVICE AND ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/849894 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 40341 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849894 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849894
Memory device and electronic device Jun 26, 2022 Issued
Array ( [id] => 19626871 [patent_doc_number] => 12165718 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-10 [patent_title] => Memory device and method of operating the same [patent_app_type] => utility [patent_app_number] => 17/849247 [patent_app_country] => US [patent_app_date] => 2022-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 13614 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849247 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849247
Memory device and method of operating the same Jun 23, 2022 Issued
Array ( [id] => 18423657 [patent_doc_number] => 20230178121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => HIGH-BANDWIDTH MEMORY MODULE ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 17/849089 [patent_app_country] => US [patent_app_date] => 2022-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7740 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849089 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849089
High-bandwidth memory module architecture Jun 23, 2022 Issued
Array ( [id] => 18423657 [patent_doc_number] => 20230178121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-08 [patent_title] => HIGH-BANDWIDTH MEMORY MODULE ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 17/849089 [patent_app_country] => US [patent_app_date] => 2022-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7740 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17849089 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/849089
High-bandwidth memory module architecture Jun 23, 2022 Issued
Array ( [id] => 19567532 [patent_doc_number] => 12142309 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Low resistance MTJ antifuse circuitry designs and methods of operation [patent_app_type] => utility [patent_app_number] => 17/847265 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5664 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 287 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17847265 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/847265
Low resistance MTJ antifuse circuitry designs and methods of operation Jun 22, 2022 Issued
Array ( [id] => 18865604 [patent_doc_number] => 20230420041 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-28 [patent_title] => SENSE AMPLIFIER CIRCUIT, MEMORY CIRCUIT, AND SENSING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/846035 [patent_app_country] => US [patent_app_date] => 2022-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10236 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17846035 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/846035
Sense amplifier circuit, memory circuit, and sensing method thereof Jun 21, 2022 Issued
Array ( [id] => 19155090 [patent_doc_number] => 11980026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-07 [patent_title] => Magnetoresistive random access memory for physically unclonable function technology and associated random code generating method [patent_app_type] => utility [patent_app_number] => 17/839519 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 8510 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 506 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17839519 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/839519
Magnetoresistive random access memory for physically unclonable function technology and associated random code generating method Jun 13, 2022 Issued
Array ( [id] => 18833852 [patent_doc_number] => 20230402379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => HYBRID SIGNAL AND POWER TRACK FOR STACKED TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/806602 [patent_app_country] => US [patent_app_date] => 2022-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8704 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806602 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/806602
HYBRID SIGNAL AND POWER TRACK FOR STACKED TRANSISTORS Jun 12, 2022 Pending
Array ( [id] => 19596781 [patent_doc_number] => 12154634 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-26 [patent_title] => Data path circuit and method [patent_app_type] => utility [patent_app_number] => 17/833562 [patent_app_country] => US [patent_app_date] => 2022-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 7435 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17833562 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/833562
Data path circuit and method Jun 5, 2022 Issued
Array ( [id] => 18192531 [patent_doc_number] => 20230046050 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-16 [patent_title] => SIGNAL ROUTING BETWEEN MEMORY DIE AND LOGIC DIE [patent_app_type] => utility [patent_app_number] => 17/830981 [patent_app_country] => US [patent_app_date] => 2022-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8812 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17830981 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/830981
Signal routing between memory die and logic die Jun 1, 2022 Issued
Array ( [id] => 17869161 [patent_doc_number] => 20220291898 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => ARITHMETIC DEVICE [patent_app_type] => utility [patent_app_number] => 17/830302 [patent_app_country] => US [patent_app_date] => 2022-06-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20506 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17830302 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/830302
ARITHMETIC DEVICE May 31, 2022 Pending
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