Search

Catherine S. Branch

Examiner (ID: 14056, Phone: (571)270-3539 , Office: P/1763 )

Most Active Art Unit
1763
Art Unit(s)
1763
Total Applications
1091
Issued Applications
874
Pending Applications
86
Abandoned Applications
151

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11043288 [patent_doc_number] => 20160240244 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-18 [patent_title] => 'COLLISION DETECTION SYSTEMS FOR DETECTING READ-WRITE COLLISIONS IN MEMORY SYSTEMS AFTER WORD LINE ACTIVATION, AND RELATED SYSTEMS AND METHODS' [patent_app_type] => utility [patent_app_number] => 14/857512 [patent_app_country] => US [patent_app_date] => 2015-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7422 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14857512 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/857512
Collision detection systems for detecting read-write collisions in memory systems after word line activation, and related systems and methods Sep 16, 2015 Issued
Array ( [id] => 11088024 [patent_doc_number] => 20160284992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'ELECTRONIC DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/856488 [patent_app_country] => US [patent_app_date] => 2015-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 13121 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14856488 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/856488
Electronic device and method for fabricating the same Sep 15, 2015 Issued
Array ( [id] => 13157009 [patent_doc_number] => 10095225 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-09 [patent_title] => Quality controlling device and control method thereof [patent_app_type] => utility [patent_app_number] => 14/854719 [patent_app_country] => US [patent_app_date] => 2015-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7097 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14854719 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/854719
Quality controlling device and control method thereof Sep 14, 2015 Issued
Array ( [id] => 10495075 [patent_doc_number] => 20150380098 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'CONTINUOUS ADJUSTING OF SENSING VOLTAGES' [patent_app_type] => utility [patent_app_number] => 14/844722 [patent_app_country] => US [patent_app_date] => 2015-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6640 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14844722 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/844722
Continuous adjusting of sensing voltages Sep 2, 2015 Issued
Array ( [id] => 10624192 [patent_doc_number] => 09343140 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'Boosted read write word line' [patent_app_type] => utility [patent_app_number] => 14/844215 [patent_app_country] => US [patent_app_date] => 2015-09-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7815 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14844215 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/844215
Boosted read write word line Sep 2, 2015 Issued
Array ( [id] => 11475256 [patent_doc_number] => 20170062039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-03-02 [patent_title] => 'MEMORY DEVICE THAT SUPPORTS MULTIPLE MEMORY CONFIGURATIONS' [patent_app_type] => utility [patent_app_number] => 14/835986 [patent_app_country] => US [patent_app_date] => 2015-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 14714 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14835986 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/835986
Memory device that supports multiple memory configurations Aug 25, 2015 Issued
Array ( [id] => 10495054 [patent_doc_number] => 20150380076 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-31 [patent_title] => 'SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE' [patent_app_type] => utility [patent_app_number] => 14/835127 [patent_app_country] => US [patent_app_date] => 2015-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10358 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14835127 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/835127
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE Aug 24, 2015 Abandoned
Array ( [id] => 11524590 [patent_doc_number] => 09608001 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-03-28 [patent_title] => 'Semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 14/833202 [patent_app_country] => US [patent_app_date] => 2015-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 5532 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14833202 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/833202
Semiconductor memory device Aug 23, 2015 Issued
Array ( [id] => 11207653 [patent_doc_number] => 09437282 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-06 [patent_title] => 'High performance sense amplifier' [patent_app_type] => utility [patent_app_number] => 14/819784 [patent_app_country] => US [patent_app_date] => 2015-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3156 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14819784 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/819784
High performance sense amplifier Aug 5, 2015 Issued
Array ( [id] => 11063522 [patent_doc_number] => 20160260485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/818878 [patent_app_country] => US [patent_app_date] => 2015-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5581 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14818878 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/818878
Semiconductor device Aug 4, 2015 Issued
Array ( [id] => 11221345 [patent_doc_number] => 09449687 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-09-20 [patent_title] => 'Sense circuits, memory devices, and related methods for resistance variable memory' [patent_app_type] => utility [patent_app_number] => 14/816344 [patent_app_country] => US [patent_app_date] => 2015-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 12963 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14816344 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/816344
Sense circuits, memory devices, and related methods for resistance variable memory Aug 2, 2015 Issued
Array ( [id] => 10447732 [patent_doc_number] => 20150332746 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'MEMORY DEVICE COMPRISING PROGRAMMABLE COMMAND-AND-ADDRESS AND/OR DATA INTERFACES' [patent_app_type] => utility [patent_app_number] => 14/813028 [patent_app_country] => US [patent_app_date] => 2015-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6531 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14813028 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/813028
Memory device comprising programmable command-and-address and/or data interfaces Jul 28, 2015 Issued
Array ( [id] => 10779784 [patent_doc_number] => 20160125939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-05-05 [patent_title] => 'RESISTIVE MEMORY DEVICE AND OPERATING METHOD' [patent_app_type] => utility [patent_app_number] => 14/806780 [patent_app_country] => US [patent_app_date] => 2015-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 15222 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14806780 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/806780
Resistive memory device and operating method Jul 22, 2015 Issued
Array ( [id] => 14329181 [patent_doc_number] => 10295601 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-05-21 [patent_title] => Method and apparatus for estimating state of battery [patent_app_type] => utility [patent_app_number] => 14/802478 [patent_app_country] => US [patent_app_date] => 2015-07-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 18 [patent_no_of_words] => 11450 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14802478 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/802478
Method and apparatus for estimating state of battery Jul 16, 2015 Issued
Array ( [id] => 11391619 [patent_doc_number] => 09552868 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-01-24 [patent_title] => 'Semiconductor memory device having various column repair modes' [patent_app_type] => utility [patent_app_number] => 14/796976 [patent_app_country] => US [patent_app_date] => 2015-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 9027 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14796976 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/796976
Semiconductor memory device having various column repair modes Jul 9, 2015 Issued
Array ( [id] => 11385732 [patent_doc_number] => 20170011788 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-01-12 [patent_title] => 'Address Decoding Circuitry' [patent_app_type] => utility [patent_app_number] => 14/796744 [patent_app_country] => US [patent_app_date] => 2015-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8118 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14796744 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/796744
Address decoding circuitry Jul 9, 2015 Issued
Array ( [id] => 10717941 [patent_doc_number] => 20160064089 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-03-03 [patent_title] => 'PAGE OR WORD-ERASABLE COMPOSITE NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 14/795742 [patent_app_country] => US [patent_app_date] => 2015-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 13060 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14795742 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/795742
Page or word-erasable composite non-volatile memory Jul 8, 2015 Issued
Array ( [id] => 11035997 [patent_doc_number] => 20160232954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-08-11 [patent_title] => 'SEMICONDUCTOR DEVICE AND OPERATING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/794244 [patent_app_country] => US [patent_app_date] => 2015-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4665 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14794244 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/794244
Semiconductor device and operating method thereof Jul 7, 2015 Issued
Array ( [id] => 11307419 [patent_doc_number] => 09514823 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-06 [patent_title] => 'Programming algorithm for improved flash memory endurance and retention' [patent_app_type] => utility [patent_app_number] => 14/794741 [patent_app_country] => US [patent_app_date] => 2015-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5871 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14794741 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/794741
Programming algorithm for improved flash memory endurance and retention Jul 7, 2015 Issued
Array ( [id] => 10825877 [patent_doc_number] => 20160172045 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-06-16 [patent_title] => 'Partial Block Erase For Open Block Reading In Non-Volatile Memory' [patent_app_type] => utility [patent_app_number] => 14/794242 [patent_app_country] => US [patent_app_date] => 2015-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 18450 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14794242 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/794242
Partial block erase for open block reading in non-volatile memory Jul 7, 2015 Issued
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