Catherine S. Branch

Array ( [id] => 8271720 [patent_doc_number] => 08213229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-07-03 [patent_title] => 'Error control in a flash memory device' [patent_app_type] => utility [patent_app_number] => 12/196758 [patent_app_country] => US [patent_app_date] => 2008-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5969 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12196758 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5347677 [patent_doc_number] => 20090003038 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'Capacitor supported precharching of memory digit lines' [patent_app_type] => utility [patent_app_number] => 12/228459 [patent_app_country] => US [patent_app_date] => 2008-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3328 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20090003038.pdf [firstpage_image] =>[orig_patent_app_number] => 12228459 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7560088 [patent_doc_number] => 20110273920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-10 [patent_title] => 'SWITCHING ELEMENT AND APPLICATION OF THE SAME' [patent_app_type] => utility [patent_app_number] => 12/672151 [patent_app_country] => US [patent_app_date] => 2008-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7019 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20110273920.pdf [firstpage_image] =>[orig_patent_app_number] => 12672151 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7566200 [patent_doc_number] => 20110286263 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-11-24 [patent_title] => 'MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/672238 [patent_app_country] => US [patent_app_date] => 2008-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 9628 [patent_no_of_claims] => 49 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0286/20110286263.pdf [firstpage_image] =>[orig_patent_app_number] => 12672238 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 6508003 [patent_doc_number] => 20100202178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-08-12 [patent_title] => 'OFFSET REMOVAL CIRCUIT, ASSOCIATIVE MEMORY INCLUDING THE SAME, AND OFFSET VOLTAGE REMOVAL METHOD' [patent_app_type] => utility [patent_app_number] => 12/665316 [patent_app_country] => US [patent_app_date] => 2008-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8549 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0202/20100202178.pdf [firstpage_image] =>[orig_patent_app_number] => 12665316 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4584775 [patent_doc_number] => 07826304 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-02 [patent_title] => 'Simplified power-down mode control circuit utilizing active mode operation control signals' [patent_app_type] => utility [patent_app_number] => 12/181426 [patent_app_country] => US [patent_app_date] => 2008-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 7721 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/826/07826304.pdf [firstpage_image] =>[orig_patent_app_number] => 12181426 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4958948 [patent_doc_number] => 20080273372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-11-06 [patent_title] => 'Method of Programming Multi-Layer Chalcogenide Devices' [patent_app_type] => utility [patent_app_number] => 12/178148 [patent_app_country] => US [patent_app_date] => 2008-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 15676 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0273/20080273372.pdf [firstpage_image] =>[orig_patent_app_number] => 12178148 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 76586 [patent_doc_number] => 07751246 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-06 [patent_title] => 'Charge loss compensation during programming of a memory device' [patent_app_type] => utility [patent_app_number] => 12/177972 [patent_app_country] => US [patent_app_date] => 2008-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4397 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/751/07751246.pdf [firstpage_image] =>[orig_patent_app_number] => 12177972 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4590557 [patent_doc_number] => 07852703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Semiconductor memory device and layout structure of sub-word line control signal generator' [patent_app_type] => utility [patent_app_number] => 12/177716 [patent_app_country] => US [patent_app_date] => 2008-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5441 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/852/07852703.pdf [firstpage_image] =>[orig_patent_app_number] => 12177716 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4611923 [patent_doc_number] => 07995407 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-08-09 [patent_title] => 'Semiconductor memory device and control method thereof' [patent_app_type] => utility [patent_app_number] => 12/177650 [patent_app_country] => US [patent_app_date] => 2008-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 13378 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/995/07995407.pdf [firstpage_image] =>[orig_patent_app_number] => 12177650 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4459019 [patent_doc_number] => 07894281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-02-22 [patent_title] => 'Redundancy circuit using column addresses' [patent_app_type] => utility [patent_app_number] => 12/177832 [patent_app_country] => US [patent_app_date] => 2008-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5324 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/894/07894281.pdf [firstpage_image] =>[orig_patent_app_number] => 12177832 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 279030 [patent_doc_number] => 07558112 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-07-07 [patent_title] => 'SRAM cell controlled by flash memory cell' [patent_app_type] => utility [patent_app_number] => 12/173117 [patent_app_country] => US [patent_app_date] => 2008-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 3937 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/558/07558112.pdf [firstpage_image] =>[orig_patent_app_number] => 12173117 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4709630 [patent_doc_number] => 20080298156 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'SEMICONDUCTOR DEVICE UNDERGOING DEFECT DETECTION TEST' [patent_app_type] => utility [patent_app_number] => 12/170055 [patent_app_country] => US [patent_app_date] => 2008-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 19480 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0298/20080298156.pdf [firstpage_image] =>[orig_patent_app_number] => 12170055 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 94658 [patent_doc_number] => 07738276 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-06-15 [patent_title] => 'Semiconductor device and method for manufacturing' [patent_app_type] => utility [patent_app_number] => 12/169270 [patent_app_country] => US [patent_app_date] => 2008-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 25 [patent_no_of_words] => 8670 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/738/07738276.pdf [firstpage_image] =>[orig_patent_app_number] => 12169270 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 44959 [patent_doc_number] => 07782646 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-24 [patent_title] => 'High density content addressable memory using phase change devices' [patent_app_type] => utility [patent_app_number] => 12/165530 [patent_app_country] => US [patent_app_date] => 2008-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4693 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/782/07782646.pdf [firstpage_image] =>[orig_patent_app_number] => 12165530 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5341568 [patent_doc_number] => 20090180218 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-07-16 [patent_title] => 'Information storage devices using magnetic domain wall movement and methods of operating the same' [patent_app_type] => utility [patent_app_number] => 12/155798 [patent_app_country] => US [patent_app_date] => 2008-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5636 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20090180218.pdf [firstpage_image] =>[orig_patent_app_number] => 12155798 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 293379 [patent_doc_number] => 07545677 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-09 [patent_title] => 'Nonvolatile memory device and methods of programming and reading the same' [patent_app_type] => utility [patent_app_number] => 12/136150 [patent_app_country] => US [patent_app_date] => 2008-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7474 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 67 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/545/07545677.pdf [firstpage_image] =>[orig_patent_app_number] => 12136150 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4598609 [patent_doc_number] => 07983097 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-19 [patent_title] => 'Wordline driving circuit of semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 12/157236 [patent_app_country] => US [patent_app_date] => 2008-06-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 5872 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/983/07983097.pdf [firstpage_image] =>[orig_patent_app_number] => 12157236 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5366216 [patent_doc_number] => 20090303775 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Static random access memory cell and devices using same' [patent_app_type] => utility [patent_app_number] => 12/134352 [patent_app_country] => US [patent_app_date] => 2008-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3396 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0303/20090303775.pdf [firstpage_image] =>[orig_patent_app_number] => 12134352 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5366223 [patent_doc_number] => 20090303782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-10 [patent_title] => 'Standalone thin film memory' [patent_app_type] => utility [patent_app_number] => 12/156998 [patent_app_country] => US [patent_app_date] => 2008-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 17180 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0303/20090303782.pdf [firstpage_image] =>[orig_patent_app_number] => 12156998 [rel_patent_id] =>[rel_patent_doc_number] =>)