Search

Cathy Fong Fong Lam

Examiner (ID: 16371)

Most Active Art Unit
1775
Art Unit(s)
1775, 1774, 1784, 1513, CSDC, 1794, 1317, 1508
Total Applications
1786
Issued Applications
1378
Pending Applications
45
Abandoned Applications
364

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7032187 [patent_doc_number] => 20050030696 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-10 [patent_title] => 'Thin metal layers-having ceramic green sheet and method for producing ceramic capacitor' [patent_app_type] => utility [patent_app_number] => 10/721344 [patent_app_country] => US [patent_app_date] => 2003-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9911 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20050030696.pdf [firstpage_image] =>[orig_patent_app_number] => 10721344 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/721344
Thin metal layers-having ceramic green sheet and method for producing ceramic capacitor Nov 25, 2003 Abandoned
Array ( [id] => 397950 [patent_doc_number] => 07294919 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-11-13 [patent_title] => 'Device having a complaint element pressed between substrates' [patent_app_type] => utility [patent_app_number] => 10/723095 [patent_app_country] => US [patent_app_date] => 2003-11-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 16 [patent_no_of_words] => 4639 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/294/07294919.pdf [firstpage_image] =>[orig_patent_app_number] => 10723095 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/723095
Device having a complaint element pressed between substrates Nov 25, 2003 Issued
Array ( [id] => 22561 [patent_doc_number] => 07794578 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-09-14 [patent_title] => 'Method for preparing a circuit board material having a conductive base and a resistance layer' [patent_app_type] => utility [patent_app_number] => 10/719020 [patent_app_country] => US [patent_app_date] => 2003-11-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4065 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/794/07794578.pdf [firstpage_image] =>[orig_patent_app_number] => 10719020 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/719020
Method for preparing a circuit board material having a conductive base and a resistance layer Nov 23, 2003 Issued
Array ( [id] => 523604 [patent_doc_number] => 07182996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-02-27 [patent_title] => 'Deposting nanowires on a substrate' [patent_app_type] => utility [patent_app_number] => 10/718999 [patent_app_country] => US [patent_app_date] => 2003-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 9891 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/182/07182996.pdf [firstpage_image] =>[orig_patent_app_number] => 10718999 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/718999
Deposting nanowires on a substrate Nov 20, 2003 Issued
Array ( [id] => 7406384 [patent_doc_number] => 20040105955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-03 [patent_title] => 'Lamination process and structure of high layout density substrate' [patent_app_type] => new [patent_app_number] => 10/717116 [patent_app_country] => US [patent_app_date] => 2003-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 3478 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0105/20040105955.pdf [firstpage_image] =>[orig_patent_app_number] => 10717116 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/717116
Lamination process and structure of high layout density substrate Nov 18, 2003 Issued
Array ( [id] => 7288938 [patent_doc_number] => 20040110024 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-10 [patent_title] => 'Electro-conductive metal plated polyimide substrate' [patent_app_type] => new [patent_app_number] => 10/715506 [patent_app_country] => US [patent_app_date] => 2003-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4780 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 40 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0110/20040110024.pdf [firstpage_image] =>[orig_patent_app_number] => 10715506 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/715506
Electro-conductive metal plated polyimide substrate Nov 18, 2003 Issued
Array ( [id] => 982654 [patent_doc_number] => 06927498 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-09 [patent_title] => 'Bond pad for flip chip package' [patent_app_type] => utility [patent_app_number] => 10/716682 [patent_app_country] => US [patent_app_date] => 2003-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 2298 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/927/06927498.pdf [firstpage_image] =>[orig_patent_app_number] => 10716682 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/716682
Bond pad for flip chip package Nov 18, 2003 Issued
Array ( [id] => 7148755 [patent_doc_number] => 20040170795 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-02 [patent_title] => 'Lasable bond-ply materials for high density printed wiring boards' [patent_app_type] => new [patent_app_number] => 10/715718 [patent_app_country] => US [patent_app_date] => 2003-11-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5464 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0170/20040170795.pdf [firstpage_image] =>[orig_patent_app_number] => 10715718 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/715718
Lasable bond-ply materials for high density printed wiring boards Nov 16, 2003 Abandoned
Array ( [id] => 7403830 [patent_doc_number] => 20040175569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-09-09 [patent_title] => 'Surface-treated ultrafine metal powder, method for producing the same, conductive metal paste of the same, and multilayer ceramic capacitor using said paste' [patent_app_type] => new [patent_app_number] => 10/712092 [patent_app_country] => US [patent_app_date] => 2003-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7604 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 24 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20040175569.pdf [firstpage_image] =>[orig_patent_app_number] => 10712092 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/712092
Surface-treated ultrafine metal powder, method for producing the same, conductive metal paste of the same, and multilayer ceramic capacitor using said paste Nov 13, 2003 Issued
Array ( [id] => 971952 [patent_doc_number] => 06936337 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-08-30 [patent_title] => 'Metal/ceramic circuit board' [patent_app_type] => utility [patent_app_number] => 10/713390 [patent_app_country] => US [patent_app_date] => 2003-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 5304 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/936/06936337.pdf [firstpage_image] =>[orig_patent_app_number] => 10713390 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/713390
Metal/ceramic circuit board Nov 13, 2003 Issued
Array ( [id] => 6905324 [patent_doc_number] => 20050100719 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-12 [patent_title] => 'Multilayer substrates having at least two dissimilar polyimide layers, useful for electronics-type applications, and compositions relating thereto' [patent_app_type] => utility [patent_app_number] => 10/706000 [patent_app_country] => US [patent_app_date] => 2003-11-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 8256 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0100/20050100719.pdf [firstpage_image] =>[orig_patent_app_number] => 10706000 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/706000
Multilayer substrates having at least two dissimilar polyimide layers, useful for electronics-type applications, and compositions relating thereto Nov 11, 2003 Issued
Array ( [id] => 1012482 [patent_doc_number] => 06896953 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-24 [patent_title] => 'Wiring board and process of producing the same' [patent_app_type] => utility [patent_app_number] => 10/703424 [patent_app_country] => US [patent_app_date] => 2003-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 5308 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/896/06896953.pdf [firstpage_image] =>[orig_patent_app_number] => 10703424 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/703424
Wiring board and process of producing the same Nov 9, 2003 Issued
Array ( [id] => 6903218 [patent_doc_number] => 20050098613 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-12 [patent_title] => 'Method for diffusion bond welding for use in a multilayer electronic assembly' [patent_app_type] => utility [patent_app_number] => 10/704029 [patent_app_country] => US [patent_app_date] => 2003-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2541 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20050098613.pdf [firstpage_image] =>[orig_patent_app_number] => 10704029 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/704029
Method for diffusion bond welding for use in a multilayer electronic assembly Nov 6, 2003 Abandoned
Array ( [id] => 7464495 [patent_doc_number] => 20040101667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Adhesion between dielectric materials' [patent_app_type] => new [patent_app_number] => 10/703246 [patent_app_country] => US [patent_app_date] => 2003-11-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 10754 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0101/20040101667.pdf [firstpage_image] =>[orig_patent_app_number] => 10703246 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/703246
Adhesion between dielectric materials Nov 5, 2003 Abandoned
Array ( [id] => 7463401 [patent_doc_number] => 20040166305 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-08-26 [patent_title] => 'Circuit substrate material, circuits comprising the same, and method of manufacture thereof' [patent_app_type] => new [patent_app_number] => 10/700343 [patent_app_country] => US [patent_app_date] => 2003-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5474 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0166/20040166305.pdf [firstpage_image] =>[orig_patent_app_number] => 10700343 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/700343
Circuit substrate material, circuits comprising the same, and method of manufacture thereof Nov 2, 2003 Issued
Array ( [id] => 7469090 [patent_doc_number] => 20040121178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-06-24 [patent_title] => 'Ultra-thin copper foil with carrier, method of production of same, and printed circuit board using ultra-thin copper foil with carrier' [patent_app_type] => new [patent_app_number] => 10/698014 [patent_app_country] => US [patent_app_date] => 2003-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 11152 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 23 [patent_words_short_claim] => 33 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20040121178.pdf [firstpage_image] =>[orig_patent_app_number] => 10698014 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/698014
Ultra-thin copper foil with carrier, method of production of same, and printed circuit board using ultra-thin copper foil with carrier Oct 30, 2003 Issued
Array ( [id] => 909471 [patent_doc_number] => 07329458 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-02-12 [patent_title] => 'Wiring member and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 10/694776 [patent_app_country] => US [patent_app_date] => 2003-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 6 [patent_no_of_words] => 11174 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/329/07329458.pdf [firstpage_image] =>[orig_patent_app_number] => 10694776 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/694776
Wiring member and method of manufacturing the same Oct 28, 2003 Issued
Array ( [id] => 314583 [patent_doc_number] => 07524552 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-04-28 [patent_title] => 'Copper foil provided with dielectric layer for forming capacitor layer, copper clad laminate for formation of capacitor layer using such copper foil with dielectric layer, and method for manufacturing producing such copper foil with dielectric layer for formation of capacitor layer' [patent_app_type] => utility [patent_app_number] => 10/532717 [patent_app_country] => US [patent_app_date] => 2003-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 18407 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/524/07524552.pdf [firstpage_image] =>[orig_patent_app_number] => 10532717 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/532717
Copper foil provided with dielectric layer for forming capacitor layer, copper clad laminate for formation of capacitor layer using such copper foil with dielectric layer, and method for manufacturing producing such copper foil with dielectric layer for formation of capacitor layer Oct 28, 2003 Issued
Array ( [id] => 7322912 [patent_doc_number] => 20040137214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-15 [patent_title] => 'Material with surface nanometer functional structure and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/690503 [patent_app_country] => US [patent_app_date] => 2003-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3262 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 27 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0137/20040137214.pdf [firstpage_image] =>[orig_patent_app_number] => 10690503 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/690503
Material with surface nanometer functional structure and method of manufacturing the same Oct 22, 2003 Abandoned
Array ( [id] => 1017736 [patent_doc_number] => 06890629 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-05-10 [patent_title] => 'Integrated thin film capacitor/inductor/interconnect system and method' [patent_app_type] => utility [patent_app_number] => 10/686128 [patent_app_country] => US [patent_app_date] => 2003-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6697 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/890/06890629.pdf [firstpage_image] =>[orig_patent_app_number] => 10686128 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/686128
Integrated thin film capacitor/inductor/interconnect system and method Oct 14, 2003 Issued
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