Search

Chandra P. Chaudhari

Examiner (ID: 9580, Phone: (571)272-1688 , Office: P/2898 )

Most Active Art Unit
2813
Art Unit(s)
2891, 2813, 2824, 2898, 2829, 1104, 2899
Total Applications
2684
Issued Applications
2485
Pending Applications
32
Abandoned Applications
170

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10151872 [patent_doc_number] => 09184169 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-10 [patent_title] => 'Methods of forming FinFET devices in different regions of an integrated circuit product' [patent_app_type] => utility [patent_app_number] => 14/250064 [patent_app_country] => US [patent_app_date] => 2014-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 5858 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14250064 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/250064
Methods of forming FinFET devices in different regions of an integrated circuit product Apr 9, 2014 Issued
Array ( [id] => 10042081 [patent_doc_number] => 09082794 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-14 [patent_title] => 'Metal oxide thin film transistor fabrication method' [patent_app_type] => utility [patent_app_number] => 14/249983 [patent_app_country] => US [patent_app_date] => 2014-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 6192 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14249983 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/249983
Metal oxide thin film transistor fabrication method Apr 9, 2014 Issued
Array ( [id] => 10410008 [patent_doc_number] => 20150295018 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/249945 [patent_app_country] => US [patent_app_date] => 2014-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3470 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14249945 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/249945
Semiconductor device and method for forming the same Apr 9, 2014 Issued
Array ( [id] => 10410020 [patent_doc_number] => 20150295029 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'PROCESS OF FORMING AN ELECTRONIC DEVICE HAVING A TERMINATION REGION INCLUDING AN INSULATING REGION' [patent_app_type] => utility [patent_app_number] => 14/249882 [patent_app_country] => US [patent_app_date] => 2014-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10940 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14249882 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/249882
Process of forming an electronic device having a termination region including an insulating region Apr 9, 2014 Issued
Array ( [id] => 10410016 [patent_doc_number] => 20150295025 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-15 [patent_title] => 'ELECTRONIC DEVICE HAVING A TERMINATION REGION INCLUDING AN INSULATING REGION' [patent_app_type] => utility [patent_app_number] => 14/249677 [patent_app_country] => US [patent_app_date] => 2014-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 10887 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14249677 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/249677
Electronic device having a termination region including an insulating region Apr 9, 2014 Issued
Array ( [id] => 10112336 [patent_doc_number] => 09147755 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-09-29 [patent_title] => 'Nanostructure-based vacuum channel transistor' [patent_app_type] => utility [patent_app_number] => 14/249238 [patent_app_country] => US [patent_app_date] => 2014-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 13 [patent_no_of_words] => 3786 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14249238 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/249238
Nanostructure-based vacuum channel transistor Apr 8, 2014 Issued
Array ( [id] => 9569280 [patent_doc_number] => 20140186993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'Multilayer Thin-Film Back Contact System For Flexible Photovoltaic Devices On Polymer Substrates' [patent_app_type] => utility [patent_app_number] => 14/198209 [patent_app_country] => US [patent_app_date] => 2014-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4411 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14198209 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/198209
Multilayer thin-film back contact system for flexible photovoltaic devices on polymer substrates Mar 4, 2014 Issued
Array ( [id] => 10184874 [patent_doc_number] => 09214558 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-15 [patent_title] => 'Method of forming semiconductor device including silicide layers' [patent_app_type] => utility [patent_app_number] => 14/192742 [patent_app_country] => US [patent_app_date] => 2014-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5565 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14192742 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/192742
Method of forming semiconductor device including silicide layers Feb 26, 2014 Issued
Array ( [id] => 9557885 [patent_doc_number] => 20140175597 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'TRENCH WITH REDUCED SILICON LOSS' [patent_app_type] => utility [patent_app_number] => 14/190229 [patent_app_country] => US [patent_app_date] => 2014-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 2127 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14190229 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/190229
TRENCH WITH REDUCED SILICON LOSS Feb 25, 2014 Abandoned
Array ( [id] => 9542479 [patent_doc_number] => 20140167125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/186369 [patent_app_country] => US [patent_app_date] => 2014-02-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 31 [patent_no_of_words] => 15774 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14186369 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/186369
Semiconductor device and manufacturing method thereof Feb 20, 2014 Issued
Array ( [id] => 10315106 [patent_doc_number] => 20150200109 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-16 [patent_title] => 'MASK PASSIVATION USING PLASMA' [patent_app_type] => utility [patent_app_number] => 14/152982 [patent_app_country] => US [patent_app_date] => 2014-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9393 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14152982 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/152982
Mask passivation using plasma Jan 9, 2014 Issued
Array ( [id] => 10079830 [patent_doc_number] => 09117683 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-25 [patent_title] => 'Semiconductor device and method of manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/147614 [patent_app_country] => US [patent_app_date] => 2014-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 31 [patent_no_of_words] => 12651 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14147614 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/147614
Semiconductor device and method of manufacturing the same Jan 5, 2014 Issued
Array ( [id] => 9432874 [patent_doc_number] => 20140110780 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-24 [patent_title] => 'INSULATED GATE TYPE SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/143196 [patent_app_country] => US [patent_app_date] => 2013-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7977 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14143196 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/143196
Insulated gate type semiconductor device and method for fabricating the same Dec 29, 2013 Issued
Array ( [id] => 10516281 [patent_doc_number] => 09243321 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-26 [patent_title] => 'Ternary metal nitride formation by annealing constituent layers' [patent_app_type] => utility [patent_app_number] => 14/143358 [patent_app_country] => US [patent_app_date] => 2013-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7227 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14143358 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/143358
Ternary metal nitride formation by annealing constituent layers Dec 29, 2013 Issued
Array ( [id] => 10525693 [patent_doc_number] => 09252213 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Integrated circuits with a buried N layer and methods for producing such integrated circuits' [patent_app_type] => utility [patent_app_number] => 14/134731 [patent_app_country] => US [patent_app_date] => 2013-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3442 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14134731 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/134731
Integrated circuits with a buried N layer and methods for producing such integrated circuits Dec 18, 2013 Issued
Array ( [id] => 10286010 [patent_doc_number] => 20150171008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-18 [patent_title] => 'INTEGRATED CIRCUITS WITH DUMMY CONTACTS AND METHODS FOR PRODUCING SUCH INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 14/109227 [patent_app_country] => US [patent_app_date] => 2013-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3329 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14109227 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/109227
INTEGRATED CIRCUITS WITH DUMMY CONTACTS AND METHODS FOR PRODUCING SUCH INTEGRATED CIRCUITS Dec 16, 2013 Abandoned
Array ( [id] => 9889434 [patent_doc_number] => 08975692 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-10 [patent_title] => 'Semiconductor device and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 14/100780 [patent_app_country] => US [patent_app_date] => 2013-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 9869 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14100780 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/100780
Semiconductor device and method of fabricating the same Dec 8, 2013 Issued
Array ( [id] => 10053433 [patent_doc_number] => 09093315 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'CMOS process to improve SRAM yield' [patent_app_type] => utility [patent_app_number] => 14/099973 [patent_app_country] => US [patent_app_date] => 2013-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 28 [patent_no_of_words] => 9374 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 379 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14099973 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/099973
CMOS process to improve SRAM yield Dec 7, 2013 Issued
Array ( [id] => 9996426 [patent_doc_number] => 09041025 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Monolithic full-color LED micro-display on an Active Matrix panel manufactured using flip-chip technology' [patent_app_type] => utility [patent_app_number] => 14/098103 [patent_app_country] => US [patent_app_date] => 2013-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 40 [patent_no_of_words] => 9401 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14098103 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/098103
Monolithic full-color LED micro-display on an Active Matrix panel manufactured using flip-chip technology Dec 4, 2013 Issued
Array ( [id] => 10544717 [patent_doc_number] => 09269855 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-23 [patent_title] => 'Method for manufacturing high efficiency light-emitting diodes' [patent_app_type] => utility [patent_app_number] => 14/097150 [patent_app_country] => US [patent_app_date] => 2013-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 4167 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14097150 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/097150
Method for manufacturing high efficiency light-emitting diodes Dec 3, 2013 Issued
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