Search

Chandra P. Chaudhari

Examiner (ID: 5221, Phone: (571)272-1688 , Office: P/2898 )

Most Active Art Unit
2813
Art Unit(s)
2898, 2829, 2813, 2824, 2899, 2891, 1104
Total Applications
2684
Issued Applications
2485
Pending Applications
32
Abandoned Applications
170

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 12061852 [patent_doc_number] => 20170338195 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-23 [patent_title] => 'Antennas and Waveguides in InFO Structures' [patent_app_type] => utility [patent_app_number] => 15/669251 [patent_app_country] => US [patent_app_date] => 2017-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 36 [patent_figures_cnt] => 36 [patent_no_of_words] => 5310 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15669251 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/669251
Antennas and waveguides in InFO structures Aug 3, 2017 Issued
Array ( [id] => 13571303 [patent_doc_number] => 20180337199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-11-22 [patent_title] => ARRAY SUBSTRATE, MANUFACTURING METHOD THEREOF, AND DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 15/558688 [patent_app_country] => US [patent_app_date] => 2017-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3754 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15558688 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/558688
Array substrate, manufacturing method thereof, and display panel Jun 21, 2017 Issued
Array ( [id] => 12154836 [patent_doc_number] => 20180026100 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-01-25 [patent_title] => 'FABRICATION OF SILICON-GERMANIUM FIN STRUCTURE HAVING SILICON-RICH OUTER SURFACE' [patent_app_type] => utility [patent_app_number] => 15/613930 [patent_app_country] => US [patent_app_date] => 2017-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3466 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15613930 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/613930
Fabrication of silicon-germanium fin structure having silicon-rich outer surface Jun 4, 2017 Issued
Array ( [id] => 11959463 [patent_doc_number] => 20170263616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-14 [patent_title] => 'EMBEDDED NONVOLATILE MEMORY AND FORMING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/607337 [patent_app_country] => US [patent_app_date] => 2017-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5435 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15607337 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/607337
Embedded nonvolatile memory and forming method thereof May 25, 2017 Issued
Array ( [id] => 13893615 [patent_doc_number] => 10199363 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-05 [patent_title] => Semiconductor memory device including output buffer [patent_app_type] => utility [patent_app_number] => 15/600526 [patent_app_country] => US [patent_app_date] => 2017-05-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 35 [patent_no_of_words] => 5793 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 213 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15600526 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/600526
Semiconductor memory device including output buffer May 18, 2017 Issued
Array ( [id] => 14011653 [patent_doc_number] => 10224302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-05 [patent_title] => Semi-conductor package structure [patent_app_type] => utility [patent_app_number] => 15/599160 [patent_app_country] => US [patent_app_date] => 2017-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2337 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15599160 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/599160
Semi-conductor package structure May 17, 2017 Issued
Array ( [id] => 16067961 [patent_doc_number] => 10692946 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-06-23 [patent_title] => Organic EL display panel and method for producing same [patent_app_type] => utility [patent_app_number] => 16/302666 [patent_app_country] => US [patent_app_date] => 2017-05-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 77 [patent_no_of_words] => 20198 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16302666 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/302666
Organic EL display panel and method for producing same May 16, 2017 Issued
Array ( [id] => 11946094 [patent_doc_number] => 20170250245 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-31 [patent_title] => 'METHOD FOR MANUFACTURING MULTILAYER CROWN-SHAPED MIM CAPACITOR' [patent_app_type] => utility [patent_app_number] => 15/594653 [patent_app_country] => US [patent_app_date] => 2017-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3626 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15594653 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/594653
Method for manufacturing multilayer crown-shaped MIM capacitor May 13, 2017 Issued
Array ( [id] => 11939696 [patent_doc_number] => 20170243846 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'Connector Structure and Method of Forming Same' [patent_app_type] => utility [patent_app_number] => 15/589315 [patent_app_country] => US [patent_app_date] => 2017-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5180 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15589315 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/589315
Connector structure and method of forming same May 7, 2017 Issued
Array ( [id] => 13085407 [patent_doc_number] => 10062777 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-08-28 [patent_title] => Trench gate trench field plate vertical MOSFET [patent_app_type] => utility [patent_app_number] => 15/485892 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 19 [patent_no_of_words] => 6164 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15485892 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/485892
Trench gate trench field plate vertical MOSFET Apr 11, 2017 Issued
Array ( [id] => 15015165 [patent_doc_number] => 10453741 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-10-22 [patent_title] => Method for forming semiconductor device contact [patent_app_type] => utility [patent_app_number] => 15/486185 [patent_app_country] => US [patent_app_date] => 2017-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4583 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15486185 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/486185
Method for forming semiconductor device contact Apr 11, 2017 Issued
Array ( [id] => 11824924 [patent_doc_number] => 20170213861 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'Metal Shielding Layer in Backside Illumination Image Sensor Chips and Methods for Forming the Same' [patent_app_type] => utility [patent_app_number] => 15/483904 [patent_app_country] => US [patent_app_date] => 2017-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3604 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15483904 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/483904
Metal shielding layer in backside illumination image sensor chips and methods for forming the same Apr 9, 2017 Issued
Array ( [id] => 13271257 [patent_doc_number] => 10147715 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-04 [patent_title] => Methods for an ESD protection circuit including trigger-voltage tunable cascode transistors [patent_app_type] => utility [patent_app_number] => 15/481202 [patent_app_country] => US [patent_app_date] => 2017-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2248 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15481202 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/481202
Methods for an ESD protection circuit including trigger-voltage tunable cascode transistors Apr 5, 2017 Issued
Array ( [id] => 12027144 [patent_doc_number] => 20170317243 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'LIGHT EMITTING DIODE PACKAGE MODULE AND DISPLAY DEVICE HAVING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/480094 [patent_app_country] => US [patent_app_date] => 2017-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7351 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15480094 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/480094
Light emitting diode package module and display device having the same Apr 4, 2017 Issued
Array ( [id] => 13461217 [patent_doc_number] => 20180282151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => HIERARCHICAL MICRO ASSEMBLER SYSTEM [patent_app_type] => utility [patent_app_number] => 15/476843 [patent_app_country] => US [patent_app_date] => 2017-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5550 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15476843 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/476843
Hierarchical micro assembler system Mar 30, 2017 Issued
Array ( [id] => 12494103 [patent_doc_number] => 09995982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-12 [patent_title] => Display device including a data line having a double line structure [patent_app_type] => utility [patent_app_number] => 15/472796 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 6 [patent_no_of_words] => 5240 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15472796 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/472796
Display device including a data line having a double line structure Mar 28, 2017 Issued
Array ( [id] => 13228925 [patent_doc_number] => 10128245 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Semiconductor devices including active areas with increased contact area [patent_app_type] => utility [patent_app_number] => 15/473031 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 9416 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15473031 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/473031
Semiconductor devices including active areas with increased contact area Mar 28, 2017 Issued
Array ( [id] => 13243337 [patent_doc_number] => 10134880 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-20 [patent_title] => Self-aligned bipolar junction transistors with a base grown in a dielectric cavity [patent_app_type] => utility [patent_app_number] => 15/473043 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 6096 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15473043 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/473043
Self-aligned bipolar junction transistors with a base grown in a dielectric cavity Mar 28, 2017 Issued
Array ( [id] => 13452219 [patent_doc_number] => 20180277652 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => FIELD EFFECT TRANSISTOR (FET) WITH A GATE HAVING A RECESSED WORK FUNCTION METAL LAYER AND METHOD OF FORMING THE FET [patent_app_type] => utility [patent_app_number] => 15/468170 [patent_app_country] => US [patent_app_date] => 2017-03-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9098 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15468170 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/468170
Field effect transistor (FET) with a gate having a recessed work function metal layer and method of forming the FET Mar 23, 2017 Issued
Array ( [id] => 13132233 [patent_doc_number] => 10084056 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-09-25 [patent_title] => Semiconductor structure and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 15/463088 [patent_app_country] => US [patent_app_date] => 2017-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5465 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15463088 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/463088
Semiconductor structure and method of manufacturing the same Mar 19, 2017 Issued
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