Search

Changhyun Yi

Examiner (ID: 10577, Phone: (571)270-7799 , Office: P/2826 )

Most Active Art Unit
2826
Art Unit(s)
2826, 2812
Total Applications
1322
Issued Applications
1144
Pending Applications
142
Abandoned Applications
68

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10597406 [patent_doc_number] => 09318501 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-19 [patent_title] => 'Methods and structures for split gate memory cell scaling with merged control gates' [patent_app_type] => utility [patent_app_number] => 14/303290 [patent_app_country] => US [patent_app_date] => 2014-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3245 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14303290 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/303290
Methods and structures for split gate memory cell scaling with merged control gates Jun 11, 2014 Issued
Array ( [id] => 10395157 [patent_doc_number] => 20150280164 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'ORGANIC LIGHT-EMITTING DIODE HAVING AN INVERSE ENERGY LEVEL LAYER' [patent_app_type] => utility [patent_app_number] => 14/297640 [patent_app_country] => US [patent_app_date] => 2014-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2821 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14297640 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/297640
ORGANIC LIGHT-EMITTING DIODE HAVING AN INVERSE ENERGY LEVEL LAYER Jun 5, 2014 Abandoned
Array ( [id] => 10537949 [patent_doc_number] => 09263586 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Quantum well fin-like field effect transistor (QWFinFET) having a two-section combo QW structure' [patent_app_type] => utility [patent_app_number] => 14/298494 [patent_app_country] => US [patent_app_date] => 2014-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5638 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14298494 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/298494
Quantum well fin-like field effect transistor (QWFinFET) having a two-section combo QW structure Jun 5, 2014 Issued
Array ( [id] => 10448067 [patent_doc_number] => 20150333082 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-19 [patent_title] => 'DUAL SILICIDE FORMATION METHOD TO EMBED SPLIT GATE FLASH\nMEMORY IN HIGH-K METAL GATE (HKMG) TECHNOLOGY' [patent_app_type] => utility [patent_app_number] => 14/296496 [patent_app_country] => US [patent_app_date] => 2014-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 6346 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14296496 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/296496
Dual silicide formation method to embed split gate flash memory in high-k metal gate (HKMG) technology Jun 4, 2014 Issued
Array ( [id] => 10472421 [patent_doc_number] => 20150357437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'MOS-Transistor with Separated Electrodes Arranged in a Trench' [patent_app_type] => utility [patent_app_number] => 14/296605 [patent_app_country] => US [patent_app_date] => 2014-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5496 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14296605 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/296605
MOS-transistor with separated electrodes arranged in a trench Jun 4, 2014 Issued
Array ( [id] => 10472364 [patent_doc_number] => 20150357380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-10 [patent_title] => 'Memory Arrays With Polygonal Memory Cells Having Specific Sidewall Orientations' [patent_app_type] => utility [patent_app_number] => 14/295770 [patent_app_country] => US [patent_app_date] => 2014-06-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 49 [patent_figures_cnt] => 49 [patent_no_of_words] => 7806 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14295770 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/295770
Memory arrays with polygonal memory cells having specific sidewall orientations Jun 3, 2014 Issued
Array ( [id] => 11787594 [patent_doc_number] => 09397056 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-07-19 [patent_title] => 'Semiconductor device having trench adjacent to receiving area and method of forming the same' [patent_app_type] => utility [patent_app_number] => 14/294531 [patent_app_country] => US [patent_app_date] => 2014-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 18 [patent_no_of_words] => 7559 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14294531 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/294531
Semiconductor device having trench adjacent to receiving area and method of forming the same Jun 2, 2014 Issued
Array ( [id] => 10259942 [patent_doc_number] => 20150144939 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-05-28 [patent_title] => 'THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/291535 [patent_app_country] => US [patent_app_date] => 2014-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 7054 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14291535 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/291535
Thin film transistor array panel having double-layered oxide semiconductor structure and method for manufacturing the same May 29, 2014 Issued
Array ( [id] => 10358781 [patent_doc_number] => 20150243786 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-27 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/288097 [patent_app_country] => US [patent_app_date] => 2014-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 7611 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14288097 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/288097
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF May 26, 2014 Abandoned
Array ( [id] => 10551526 [patent_doc_number] => 09276160 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-01 [patent_title] => 'Power semiconductor device formed from a vertical thyristor epitaxial layer structure' [patent_app_type] => utility [patent_app_number] => 14/287388 [patent_app_country] => US [patent_app_date] => 2014-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 12 [patent_no_of_words] => 15708 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 282 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14287388 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/287388
Power semiconductor device formed from a vertical thyristor epitaxial layer structure May 26, 2014 Issued
Array ( [id] => 10455433 [patent_doc_number] => 20150340448 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-26 [patent_title] => 'METHOD FOR CREATION OF THE GATE SHIELD IN ANALOG/RF POWER ED-CMOS IN SIGE BICMOS TECHNOLOGIES' [patent_app_type] => utility [patent_app_number] => 14/286805 [patent_app_country] => US [patent_app_date] => 2014-05-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5464 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14286805 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/286805
Method of forming a gate shield in an ED-CMOS transistor and a base of a bipolar transistor using BICMOS technologies May 22, 2014 Issued
Array ( [id] => 9931509 [patent_doc_number] => 20150079701 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND MANUFACTURING APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/194409 [patent_app_country] => US [patent_app_date] => 2014-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4627 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14194409 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/194409
SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND MANUFACTURING APPARATUS Feb 27, 2014 Abandoned
Array ( [id] => 9917244 [patent_doc_number] => 20150072449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-12 [patent_title] => 'METHOD FOR MANUFACTURING ORGANIC LIGHT EMITTING DIODE DISPLAY AND METHOD FOR MANUFACTURING TOUCH PANEL' [patent_app_type] => utility [patent_app_number] => 14/191594 [patent_app_country] => US [patent_app_date] => 2014-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8262 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14191594 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/191594
Method for manufacturing organic light emitting diode display and method for manufacturing touch panel Feb 26, 2014 Issued
Array ( [id] => 10531189 [patent_doc_number] => 09257329 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-09 [patent_title] => 'Methods for fabricating integrated circuits including densifying interlevel dielectric layers' [patent_app_type] => utility [patent_app_number] => 14/185398 [patent_app_country] => US [patent_app_date] => 2014-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3657 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14185398 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/185398
Methods for fabricating integrated circuits including densifying interlevel dielectric layers Feb 19, 2014 Issued
Array ( [id] => 10350833 [patent_doc_number] => 20150235839 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'METHODS FOR FABRICATING INTEGRATED CIRCUITS USING DIRECTED SELF-ASSEMBLY INCLUDING LITHOGRAPHICALLY-PRINTABLE ASSIST FEATURES' [patent_app_type] => utility [patent_app_number] => 14/185491 [patent_app_country] => US [patent_app_date] => 2014-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5647 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14185491 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/185491
Methods for fabricating integrated circuits using directed self-assembly including lithographically-printable assist features Feb 19, 2014 Issued
Array ( [id] => 10350974 [patent_doc_number] => 20150235979 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-08-20 [patent_title] => 'UNIVERSAL SOLDER JOINTS FOR 3D PACKAGING' [patent_app_type] => utility [patent_app_number] => 14/181616 [patent_app_country] => US [patent_app_date] => 2014-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6044 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14181616 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/181616
Universal solder joints for 3D packaging Feb 13, 2014 Issued
Array ( [id] => 10570493 [patent_doc_number] => 09293674 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'Light emitting device including light emitting element, outer connection electrodes and resin layer' [patent_app_type] => utility [patent_app_number] => 14/176375 [patent_app_country] => US [patent_app_date] => 2014-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 13 [patent_no_of_words] => 6411 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14176375 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/176375
Light emitting device including light emitting element, outer connection electrodes and resin layer Feb 9, 2014 Issued
Array ( [id] => 9728841 [patent_doc_number] => 20140264548 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'Semiconductor Devices and Methods of Manufacturing the Same' [patent_app_type] => utility [patent_app_number] => 14/176332 [patent_app_country] => US [patent_app_date] => 2014-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 10767 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14176332 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/176332
Memory devices having semiconductor patterns on a substrate and methods of manufacturing the same Feb 9, 2014 Issued
Array ( [id] => 10172281 [patent_doc_number] => 09202994 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-01 [patent_title] => 'Semiconductor light emitting element and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 14/176272 [patent_app_country] => US [patent_app_date] => 2014-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 19 [patent_no_of_words] => 16966 [patent_no_of_claims] => 55 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 248 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14176272 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/176272
Semiconductor light emitting element and method for manufacturing the same Feb 9, 2014 Issued
Array ( [id] => 9667942 [patent_doc_number] => 20140231805 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-08-21 [patent_title] => 'DISPLAY UNIT, METHOD OF DRIVING THE SAME, AND ELECTRONIC APPARATUS' [patent_app_type] => utility [patent_app_number] => 14/176324 [patent_app_country] => US [patent_app_date] => 2014-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 10371 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14176324 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/176324
DISPLAY UNIT, METHOD OF DRIVING THE SAME, AND ELECTRONIC APPARATUS Feb 9, 2014 Abandoned
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