Charles Atkinson

Array ( [id] => 2596027 [patent_doc_number] => 04908828 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-03-13 [patent_title] => 'Method for error free message reception' [patent_app_type] => 1 [patent_app_number] => 7/138852 [patent_app_country] => US [patent_app_date] => 1987-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3283 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/908/04908828.pdf [firstpage_image] =>[orig_patent_app_number] => 138852 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2531905 [patent_doc_number] => 04878221 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-10-31 [patent_title] => 'Error-correcting decoder for rapidly dealing with buffer overflow' [patent_app_type] => 1 [patent_app_number] => 7/138273 [patent_app_country] => US [patent_app_date] => 1987-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7833 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/878/04878221.pdf [firstpage_image] =>[orig_patent_app_number] => 138273 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2530561 [patent_doc_number] => 04885749 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-05 [patent_title] => 'Data transmission with improved message format' [patent_app_type] => 1 [patent_app_number] => 7/137996 [patent_app_country] => US [patent_app_date] => 1987-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 5550 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/885/04885749.pdf [firstpage_image] =>[orig_patent_app_number] => 137996 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2520791 [patent_doc_number] => 04831622 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-16 [patent_title] => 'Apparatus for forcing a reload from main memory upon cache memory error' [patent_app_type] => 1 [patent_app_number] => 7/136301 [patent_app_country] => US [patent_app_date] => 1987-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3967 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/831/04831622.pdf [firstpage_image] =>[orig_patent_app_number] => 136301 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2647143 [patent_doc_number] => 04910735 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-03-20 [patent_title] => 'Semiconductor integrated circuit with self-testing' [patent_app_type] => 1 [patent_app_number] => 7/134070 [patent_app_country] => US [patent_app_date] => 1987-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 3803 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/910/04910735.pdf [firstpage_image] =>[orig_patent_app_number] => 134070 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2535673 [patent_doc_number] => 04888774 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-19 [patent_title] => 'Error detection system' [patent_app_type] => 1 [patent_app_number] => 7/132993 [patent_app_country] => US [patent_app_date] => 1987-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5099 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/888/04888774.pdf [firstpage_image] =>[orig_patent_app_number] => 132993 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2539408 [patent_doc_number] => 04862462 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-08-29 [patent_title] => 'Memory systems and related error detection and correction apparatus' [patent_app_type] => 1 [patent_app_number] => 7/132842 [patent_app_country] => US [patent_app_date] => 1987-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 5240 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/862/04862462.pdf [firstpage_image] =>[orig_patent_app_number] => 132842 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2535799 [patent_doc_number] => 04888780 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-19 [patent_title] => 'Method of detecting and correcting an error that has occurred in a digital computer' [patent_app_type] => 1 [patent_app_number] => 7/131063 [patent_app_country] => US [patent_app_date] => 1987-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 28 [patent_no_of_words] => 3242 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/888/04888780.pdf [firstpage_image] =>[orig_patent_app_number] => 131063 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2599129 [patent_doc_number] => 04959836 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-09-25 [patent_title] => 'Register robustness improvement circuit and method' [patent_app_type] => 1 [patent_app_number] => 7/130850 [patent_app_country] => US [patent_app_date] => 1987-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2487 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 543 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/959/04959836.pdf [firstpage_image] =>[orig_patent_app_number] => 130850 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2482508 [patent_doc_number] => 04887269 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-12-12 [patent_title] => 'Apparatus for the reception of radio broadcasted digital signals' [patent_app_type] => 1 [patent_app_number] => 7/127411 [patent_app_country] => US [patent_app_date] => 1987-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 3775 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/887/04887269.pdf [firstpage_image] =>[orig_patent_app_number] => 127411 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2552936 [patent_doc_number] => 04827478 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-05-02 [patent_title] => 'Data integrity checking with fault tolerance' [patent_app_type] => 1 [patent_app_number] => 7/126812 [patent_app_country] => US [patent_app_date] => 1987-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3238 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/827/04827478.pdf [firstpage_image] =>[orig_patent_app_number] => 126812 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2502594 [patent_doc_number] => 04825438 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-04-25 [patent_title] => 'Bus error detection employing parity verification' [patent_app_type] => 1 [patent_app_number] => 7/098634 [patent_app_country] => US [patent_app_date] => 1987-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 255 [patent_figures_cnt] => 416 [patent_no_of_words] => 161348 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/825/04825438.pdf [firstpage_image] =>[orig_patent_app_number] => 098634 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2522045 [patent_doc_number] => 04841527 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-06-20 [patent_title] => 'Stabilization of random access packet CDMA networks' [patent_app_type] => 1 [patent_app_number] => 7/121423 [patent_app_country] => US [patent_app_date] => 1987-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 6433 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/841/04841527.pdf [firstpage_image] =>[orig_patent_app_number] => 121423 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2573365 [patent_doc_number] => 04849975 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-18 [patent_title] => 'Error correction method and apparatus' [patent_app_type] => 1 [patent_app_number] => 7/119011 [patent_app_country] => US [patent_app_date] => 1987-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 7727 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/849/04849975.pdf [firstpage_image] =>[orig_patent_app_number] => 119011 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2525328 [patent_doc_number] => 04852094 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-07-25 [patent_title] => 'Dual path switch gate array' [patent_app_type] => 1 [patent_app_number] => 7/119363 [patent_app_country] => US [patent_app_date] => 1987-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4774 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/852/04852094.pdf [firstpage_image] =>[orig_patent_app_number] => 119363 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2564360 [patent_doc_number] => 04897842 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-01-30 [patent_title] => 'Integrated circuit signature analyzer for testing digital circuitry' [patent_app_type] => 1 [patent_app_number] => 7/117772 [patent_app_country] => US [patent_app_date] => 1987-11-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 6462 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 57 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/897/04897842.pdf [firstpage_image] =>[orig_patent_app_number] => 117772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2495709 [patent_doc_number] => 04866713 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-09-12 [patent_title] => 'Operational function checking method and device for microprocessors' [patent_app_type] => 1 [patent_app_number] => 7/115483 [patent_app_country] => US [patent_app_date] => 1987-11-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2687 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/866/04866713.pdf [firstpage_image] =>[orig_patent_app_number] => 115483 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2540206 [patent_doc_number] => 04839897 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1989-06-13 [patent_title] => 'Fault detecting system for ADPCM codec' [patent_app_type] => 1 [patent_app_number] => 7/114302 [patent_app_country] => US [patent_app_date] => 1987-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3408 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/839/04839897.pdf [firstpage_image] =>[orig_patent_app_number] => 114302 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 2678767 [patent_doc_number] => 04905240 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1990-02-27 [patent_title] => 'Semi-custom-made integrated circuit device' [patent_app_type] => 1 [patent_app_number] => 7/113553 [patent_app_country] => US [patent_app_date] => 1987-10-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 4251 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/04/905/04905240.pdf [firstpage_image] =>[orig_patent_app_number] => 113553 [rel_patent_id] =>[rel_patent_doc_number] =>)