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Charles Atkinson

Examiner (ID: 2446)

Most Active Art Unit
2306
Art Unit(s)
2313, 2604, 2307, 2306, 2305, 2413
Total Applications
1186
Issued Applications
1116
Pending Applications
2
Abandoned Applications
68

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3014837 [patent_doc_number] => 05375125 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-20 [patent_title] => 'Method of displaying program execution for a computer' [patent_app_type] => 1 [patent_app_number] => 7/882471 [patent_app_country] => US [patent_app_date] => 1992-05-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 38 [patent_figures_cnt] => 50 [patent_no_of_words] => 17461 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 14 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/375/05375125.pdf [firstpage_image] =>[orig_patent_app_number] => 882471 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/882471
Method of displaying program execution for a computer May 12, 1992 Issued
Array ( [id] => 2886390 [patent_doc_number] => 05185747 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-09 [patent_title] => 'Data symbol estimation' [patent_app_type] => 1 [patent_app_number] => 7/882360 [patent_app_country] => US [patent_app_date] => 1992-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 4952 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 208 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/185/05185747.pdf [firstpage_image] =>[orig_patent_app_number] => 882360 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/882360
Data symbol estimation May 5, 1992 Issued
Array ( [id] => 2974273 [patent_doc_number] => 05274645 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-12-28 [patent_title] => 'Disk array system' [patent_app_type] => 1 [patent_app_number] => 7/872560 [patent_app_country] => US [patent_app_date] => 1992-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 37 [patent_no_of_words] => 23439 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/274/05274645.pdf [firstpage_image] =>[orig_patent_app_number] => 872560 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/872560
Disk array system Apr 22, 1992 Issued
07/861758 HIGH SPEED FAIL PROCESSOR Mar 31, 1992 Abandoned
Array ( [id] => 3436363 [patent_doc_number] => 05416785 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-05-16 [patent_title] => 'Data communication apparatus having memory control in an error correction communication mode' [patent_app_type] => 1 [patent_app_number] => 7/858411 [patent_app_country] => US [patent_app_date] => 1992-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1924 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/416/05416785.pdf [firstpage_image] =>[orig_patent_app_number] => 858411 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/858411
Data communication apparatus having memory control in an error correction communication mode Mar 26, 1992 Issued
07/849511 STORAGE UNIT GENERATION OF REDUNDANCY INFORMATION IN A REDUNDANT STORAGE ARRAY SYSTEM Mar 10, 1992 Abandoned
90/002639 DIAGNOSTIC CIRCUIT Feb 17, 1992 Issued
07/824892 METHOD FOR AUTOMATIC ISOLATION OF FUNCTIONAL BLOCKS WITHIN INTEGRATED CIRCUITS Jan 21, 1992 Abandoned
Array ( [id] => 3026392 [patent_doc_number] => 05341381 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-23 [patent_title] => 'Redundant array parity caching system' [patent_app_type] => 1 [patent_app_number] => 7/823141 [patent_app_country] => US [patent_app_date] => 1992-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7150 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/341/05341381.pdf [firstpage_image] =>[orig_patent_app_number] => 823141 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/823141
Redundant array parity caching system Jan 20, 1992 Issued
Array ( [id] => 3133924 [patent_doc_number] => 05381544 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-10 [patent_title] => 'Copyback memory system and cache memory controller which permits access while error recovery operations are performed' [patent_app_type] => 1 [patent_app_number] => 7/822110 [patent_app_country] => US [patent_app_date] => 1992-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6793 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/381/05381544.pdf [firstpage_image] =>[orig_patent_app_number] => 822110 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/822110
Copyback memory system and cache memory controller which permits access while error recovery operations are performed Jan 16, 1992 Issued
Array ( [id] => 3082225 [patent_doc_number] => 05361346 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-01 [patent_title] => 'Portable tester (qualifier) for evaluating and testing SCSI interface magnetic disc drives in accordance with ANSI SCSI-A and SCSI-2 definitions' [patent_app_type] => 1 [patent_app_number] => 7/820912 [patent_app_country] => US [patent_app_date] => 1992-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 49 [patent_no_of_words] => 6955 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 20 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/361/05361346.pdf [firstpage_image] =>[orig_patent_app_number] => 820912 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/820912
Portable tester (qualifier) for evaluating and testing SCSI interface magnetic disc drives in accordance with ANSI SCSI-A and SCSI-2 definitions Jan 14, 1992 Issued
Array ( [id] => 3025605 [patent_doc_number] => 05309448 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-03 [patent_title] => 'Methods and systems for alarm correlation and fault localization in communication networks' [patent_app_type] => 1 [patent_app_number] => 7/817011 [patent_app_country] => US [patent_app_date] => 1992-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 5544 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/309/05309448.pdf [firstpage_image] =>[orig_patent_app_number] => 817011 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/817011
Methods and systems for alarm correlation and fault localization in communication networks Jan 2, 1992 Issued
Array ( [id] => 3045287 [patent_doc_number] => 05329533 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-12 [patent_title] => 'Partial-scan built-in self-test technique' [patent_app_type] => 1 [patent_app_number] => 7/813521 [patent_app_country] => US [patent_app_date] => 1991-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 5422 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/329/05329533.pdf [firstpage_image] =>[orig_patent_app_number] => 813521 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/813521
Partial-scan built-in self-test technique Dec 25, 1991 Issued
Array ( [id] => 3469207 [patent_doc_number] => 05383201 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-01-17 [patent_title] => 'Method and apparatus for locating source of error in high-speed synchronous systems' [patent_app_type] => 1 [patent_app_number] => 7/813891 [patent_app_country] => US [patent_app_date] => 1991-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 11395 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/383/05383201.pdf [firstpage_image] =>[orig_patent_app_number] => 813891 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/813891
Method and apparatus for locating source of error in high-speed synchronous systems Dec 22, 1991 Issued
Array ( [id] => 3050614 [patent_doc_number] => 05377201 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-12-27 [patent_title] => 'Transitive closure based process for generating test vectors for VLSI circuit' [patent_app_type] => 1 [patent_app_number] => 7/813144 [patent_app_country] => US [patent_app_date] => 1991-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 28 [patent_no_of_words] => 8165 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/377/05377201.pdf [firstpage_image] =>[orig_patent_app_number] => 813144 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/813144
Transitive closure based process for generating test vectors for VLSI circuit Dec 18, 1991 Issued
Array ( [id] => 3104571 [patent_doc_number] => 05369647 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-11-29 [patent_title] => 'Circuitry and method for testing a write state machine' [patent_app_type] => 1 [patent_app_number] => 7/808381 [patent_app_country] => US [patent_app_date] => 1991-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 26 [patent_no_of_words] => 17331 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/369/05369647.pdf [firstpage_image] =>[orig_patent_app_number] => 808381 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/808381
Circuitry and method for testing a write state machine Dec 15, 1991 Issued
Array ( [id] => 3042175 [patent_doc_number] => 05343478 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-30 [patent_title] => 'Computer system configuration via test bus' [patent_app_type] => 1 [patent_app_number] => 7/800901 [patent_app_country] => US [patent_app_date] => 1991-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 27 [patent_no_of_words] => 10130 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/343/05343478.pdf [firstpage_image] =>[orig_patent_app_number] => 800901 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/800901
Computer system configuration via test bus Nov 26, 1991 Issued
Array ( [id] => 3062137 [patent_doc_number] => 05325368 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-06-28 [patent_title] => 'JTAG component description via nonvolatile memory' [patent_app_type] => 1 [patent_app_number] => 7/799512 [patent_app_country] => US [patent_app_date] => 1991-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 25 [patent_no_of_words] => 9754 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/325/05325368.pdf [firstpage_image] =>[orig_patent_app_number] => 799512 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/799512
JTAG component description via nonvolatile memory Nov 26, 1991 Issued
Array ( [id] => 3492171 [patent_doc_number] => 05406564 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-04-11 [patent_title] => 'Communication line backup system' [patent_app_type] => 1 [patent_app_number] => 7/796421 [patent_app_country] => US [patent_app_date] => 1991-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6061 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 207 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/406/05406564.pdf [firstpage_image] =>[orig_patent_app_number] => 796421 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/796421
Communication line backup system Nov 21, 1991 Issued
Array ( [id] => 3023905 [patent_doc_number] => 05333285 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-07-26 [patent_title] => 'System crash detect and automatic reset mechanism for processor cards' [patent_app_type] => 1 [patent_app_number] => 7/795562 [patent_app_country] => US [patent_app_date] => 1991-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3350 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/333/05333285.pdf [firstpage_image] =>[orig_patent_app_number] => 795562 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/795562
System crash detect and automatic reset mechanism for processor cards Nov 20, 1991 Issued
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