
Charles Chiang Chow
Examiner (ID: 5644)
| Most Active Art Unit | 2618 |
| Art Unit(s) | 2685, 2649, 2741, 2618, 2749, 2684 |
| Total Applications | 615 |
| Issued Applications | 432 |
| Pending Applications | 47 |
| Abandoned Applications | 136 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6415080
[patent_doc_number] => 20020125515
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-09-12
[patent_title] => 'Field effect transistor using zirconiumtitanate thin film'
[patent_app_type] => new
[patent_app_number] => 09/920637
[patent_app_country] => US
[patent_app_date] => 2001-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[patent_no_of_words] => 3081
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[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0125/20020125515.pdf
[firstpage_image] =>[orig_patent_app_number] => 09920637
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/920637 | Field effect transistor using zirconiumtitanate thin film | Aug 2, 2001 | Abandoned |
Array
(
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[patent_doc_number] => 20020014634
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-02-07
[patent_title] => 'Semiconductor device and method of manufacturing the same'
[patent_app_type] => new
[patent_app_number] => 09/911397
[patent_app_country] => US
[patent_app_date] => 2001-07-25
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[pdf_file] => publications/A1/0014/20020014634.pdf
[firstpage_image] =>[orig_patent_app_number] => 09911397
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/911397 | Semiconductor device having a gate insulating film comprising a metal oxide and method of manufacturing the same | Jul 24, 2001 | Issued |
Array
(
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[patent_doc_number] => 06869899
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2005-03-22
[patent_title] => 'Lateral-only photoresist trimming for sub-80 nm gate stack'
[patent_app_type] => utility
[patent_app_number] => 09/902727
[patent_app_country] => US
[patent_app_date] => 2001-07-12
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Array
(
[id] => 5874136
[patent_doc_number] => 20020048951
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2002-04-25
[patent_title] => 'Method for manufacturing a chip scale package'
[patent_app_type] => new
[patent_app_number] => 09/891116
[patent_app_country] => US
[patent_app_date] => 2001-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/891116 | Method for manufacturing a chip scale package | Jun 24, 2001 | Abandoned |
Array
(
[id] => 6921574
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[patent_kind] => A1
[patent_issue_date] => 2001-10-11
[patent_title] => 'Chip photoelectric sensor assembly and method for making same'
[patent_app_type] => new
[patent_app_number] => 09/881757
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[patent_app_date] => 2001-06-18
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/881757 | Chip photoelectric sensor assembly and method for making same | Jun 17, 2001 | Issued |
Array
(
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[patent_doc_number] => 20010029074
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[patent_kind] => A1
[patent_issue_date] => 2001-10-11
[patent_title] => 'Semiconductor device and process of producing the same'
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Array
(
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[patent_doc_number] => 06673633
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[patent_issue_date] => 2004-01-06
[patent_title] => 'Method of forming patterned thin film and method of manufacturing thin-film magnetic head'
[patent_app_type] => B2
[patent_app_number] => 09/870737
[patent_app_country] => US
[patent_app_date] => 2001-06-01
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/870737 | Method of forming patterned thin film and method of manufacturing thin-film magnetic head | May 31, 2001 | Issued |
Array
(
[id] => 1270157
[patent_doc_number] => 06653197
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[patent_issue_date] => 2003-11-25
[patent_title] => 'Method for fabricating capacitor of semiconductor device'
[patent_app_type] => B2
[patent_app_number] => 09/867657
[patent_app_country] => US
[patent_app_date] => 2001-05-31
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[firstpage_image] =>[orig_patent_app_number] => 09867657
[rel_patent_id] =>[rel_patent_doc_number] =>) 09/867657 | Method for fabricating capacitor of semiconductor device | May 30, 2001 | Issued |
Array
(
[id] => 1205579
[patent_doc_number] => 06716717
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[patent_issue_date] => 2004-04-06
[patent_title] => 'Method for fabricating capacitor of semiconductor device'
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[patent_app_number] => 09/867527
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Array
(
[id] => 6447079
[patent_doc_number] => 20020177264
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[patent_issue_date] => 2002-11-28
[patent_title] => 'Reducing threshold voltage roll-up/roll-off effect for MOSFETS'
[patent_app_type] => new
[patent_app_number] => 09/866397
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Array
(
[id] => 5874074
[patent_doc_number] => 20020048897
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[patent_title] => 'Method of forming a self-aligned shallow trench isolation'
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[patent_app_number] => 09/864627
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[rel_patent_id] =>[rel_patent_doc_number] =>) 09/864627 | Method of forming a self-aligned shallow trench isolation | May 23, 2001 | Abandoned |
Array
(
[id] => 6447487
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[patent_title] => 'Method for sealing via sidewalls in porous low-k dielectric layers'
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Array
(
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[patent_title] => 'Dual damascene partial gap fill polymer fabrication process'
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Array
(
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[patent_title] => 'Methods for forming metal wiring layers and metal interconnects and metal interconnects formed thereby'
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Array
(
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Array
(
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Array
(
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[patent_title] => 'Semiconductor devices with dual nature capping/ARC layers on fluorine doped silica glass inter-layer dielectrics and method of forming capping/ARC layers'
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Array
(
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Array
(
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Array
(
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