Search

Charles Chiang Chow

Examiner (ID: 5644)

Most Active Art Unit
2618
Art Unit(s)
2685, 2649, 2741, 2618, 2749, 2684
Total Applications
615
Issued Applications
432
Pending Applications
47
Abandoned Applications
136

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 1424125 [patent_doc_number] => 06503789 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-01-07 [patent_title] => 'Contact structure for a semiconductor device and manufacturing method thereof' [patent_app_type] => B1 [patent_app_number] => 09/610293 [patent_app_country] => US [patent_app_date] => 2000-07-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4132 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 228 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/503/06503789.pdf [firstpage_image] =>[orig_patent_app_number] => 09610293 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/610293
Contact structure for a semiconductor device and manufacturing method thereof Jul 4, 2000 Issued
09/605037 Semiconductor component and method of manufacturing Jun 26, 2000 Abandoned
Array ( [id] => 1288760 [patent_doc_number] => 06632721 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-10-14 [patent_title] => 'Method of manufacturing semiconductor devices having capacitors with electrode including hemispherical grains' [patent_app_type] => B1 [patent_app_number] => 09/602887 [patent_app_country] => US [patent_app_date] => 2000-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 64 [patent_no_of_words] => 18666 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/632/06632721.pdf [firstpage_image] =>[orig_patent_app_number] => 09602887 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/602887
Method of manufacturing semiconductor devices having capacitors with electrode including hemispherical grains Jun 22, 2000 Issued
Array ( [id] => 1440108 [patent_doc_number] => 06495453 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Method for improving the quality of a metal layer deposited from a plating bath' [patent_app_type] => B1 [patent_app_number] => 09/599133 [patent_app_country] => US [patent_app_date] => 2000-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4202 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/495/06495453.pdf [firstpage_image] =>[orig_patent_app_number] => 09599133 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/599133
Method for improving the quality of a metal layer deposited from a plating bath Jun 21, 2000 Issued
Array ( [id] => 1585726 [patent_doc_number] => 06358867 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Orientation independent oxidation of silicon' [patent_app_type] => B1 [patent_app_number] => 09/596097 [patent_app_country] => US [patent_app_date] => 2000-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 2865 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/358/06358867.pdf [firstpage_image] =>[orig_patent_app_number] => 09596097 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/596097
Orientation independent oxidation of silicon Jun 15, 2000 Issued
Array ( [id] => 1261484 [patent_doc_number] => 06664169 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-12-16 [patent_title] => 'Process for producing semiconductor member, process for producing solar cell, and anodizing apparatus' [patent_app_type] => B1 [patent_app_number] => 09/586887 [patent_app_country] => US [patent_app_date] => 2000-06-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 57 [patent_no_of_words] => 16422 [patent_no_of_claims] => 39 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/664/06664169.pdf [firstpage_image] =>[orig_patent_app_number] => 09586887 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/586887
Process for producing semiconductor member, process for producing solar cell, and anodizing apparatus Jun 4, 2000 Issued
Array ( [id] => 6657286 [patent_doc_number] => 20030077901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'METHOD FOR FORMING A REFRACTORY-METAL-SILICIDE LAYER IN A SEMICONDUCTOR DEVICE' [patent_app_type] => new [patent_app_number] => 09/560337 [patent_app_country] => US [patent_app_date] => 2000-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4499 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0077/20030077901.pdf [firstpage_image] =>[orig_patent_app_number] => 09560337 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/560337
Method for forming a refractory-metal-silicide layer in a semiconductor device Apr 27, 2000 Issued
Array ( [id] => 1318395 [patent_doc_number] => 06605518 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-08-12 [patent_title] => 'Method of separating composite member and process for producing thin film' [patent_app_type] => B1 [patent_app_number] => 09/558657 [patent_app_country] => US [patent_app_date] => 2000-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 38 [patent_no_of_words] => 11871 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/605/06605518.pdf [firstpage_image] =>[orig_patent_app_number] => 09558657 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/558657
Method of separating composite member and process for producing thin film Apr 25, 2000 Issued
09/552497 Method of manufacturing semiconductor device Apr 18, 2000 Abandoned
Array ( [id] => 6081222 [patent_doc_number] => 20020081842 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'Electroless metal liner formation methods' [patent_app_type] => new [patent_app_number] => 09/549907 [patent_app_country] => US [patent_app_date] => 2000-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1932 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20020081842.pdf [firstpage_image] =>[orig_patent_app_number] => 09549907 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/549907
Electroless metal liner formation methods Apr 13, 2000 Abandoned
Array ( [id] => 1104961 [patent_doc_number] => 06812131 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-11-02 [patent_title] => 'Use of sacrificial inorganic dielectrics for dual damascene processes utilizing organic intermetal dielectrics' [patent_app_type] => B1 [patent_app_number] => 09/547167 [patent_app_country] => US [patent_app_date] => 2000-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 21 [patent_no_of_words] => 5961 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/812/06812131.pdf [firstpage_image] =>[orig_patent_app_number] => 09547167 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/547167
Use of sacrificial inorganic dielectrics for dual damascene processes utilizing organic intermetal dielectrics Apr 10, 2000 Issued
09/546407 Method for manufacturing diffusion barrier layer Apr 9, 2000 Abandoned
Array ( [id] => 1303035 [patent_doc_number] => 06620720 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-09-16 [patent_title] => 'Interconnections to copper IC\'s' [patent_app_type] => B1 [patent_app_number] => 09/546037 [patent_app_country] => US [patent_app_date] => 2000-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 10 [patent_no_of_words] => 2787 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/620/06620720.pdf [firstpage_image] =>[orig_patent_app_number] => 09546037 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/546037
Interconnections to copper IC's Apr 9, 2000 Issued
Array ( [id] => 1302563 [patent_doc_number] => 06620632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-09-16 [patent_title] => 'Method for evaluating impurity concentrations in semiconductor substrates' [patent_app_type] => B2 [patent_app_number] => 09/544197 [patent_app_country] => US [patent_app_date] => 2000-04-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3417 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/620/06620632.pdf [firstpage_image] =>[orig_patent_app_number] => 09544197 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/544197
Method for evaluating impurity concentrations in semiconductor substrates Apr 5, 2000 Issued
Array ( [id] => 1411836 [patent_doc_number] => 06524897 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'Semiconductor-on-insulator resistor-capacitor circuit' [patent_app_type] => B1 [patent_app_number] => 09/540117 [patent_app_country] => US [patent_app_date] => 2000-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 1919 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/524/06524897.pdf [firstpage_image] =>[orig_patent_app_number] => 09540117 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/540117
Semiconductor-on-insulator resistor-capacitor circuit Mar 30, 2000 Issued
Array ( [id] => 1419191 [patent_doc_number] => 06525381 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-02-25 [patent_title] => 'Semiconductor-on-insulator body-source contact using shallow-doped source, and method' [patent_app_type] => B1 [patent_app_number] => 09/541127 [patent_app_country] => US [patent_app_date] => 2000-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 27 [patent_no_of_words] => 6898 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/525/06525381.pdf [firstpage_image] =>[orig_patent_app_number] => 09541127 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/541127
Semiconductor-on-insulator body-source contact using shallow-doped source, and method Mar 30, 2000 Issued
Array ( [id] => 1439971 [patent_doc_number] => 06495388 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Surface micro-machined sensor with pedestal' [patent_app_type] => B1 [patent_app_number] => 09/538127 [patent_app_country] => US [patent_app_date] => 2000-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 21 [patent_no_of_words] => 5761 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/495/06495388.pdf [firstpage_image] =>[orig_patent_app_number] => 09538127 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/538127
Surface micro-machined sensor with pedestal Mar 28, 2000 Issued
Array ( [id] => 1520719 [patent_doc_number] => 06413848 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-07-02 [patent_title] => 'Self-aligned fuse structure and method with dual-thickness dielectric' [patent_app_type] => B1 [patent_app_number] => 09/534907 [patent_app_country] => US [patent_app_date] => 2000-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 10 [patent_no_of_words] => 5210 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/413/06413848.pdf [firstpage_image] =>[orig_patent_app_number] => 09534907 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/534907
Self-aligned fuse structure and method with dual-thickness dielectric Mar 22, 2000 Issued
Array ( [id] => 1528191 [patent_doc_number] => 06479411 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-12 [patent_title] => 'Method for forming high quality multiple thickness oxide using high temperature descum' [patent_app_type] => B1 [patent_app_number] => 09/532347 [patent_app_country] => US [patent_app_date] => 2000-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 3125 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/479/06479411.pdf [firstpage_image] =>[orig_patent_app_number] => 09532347 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/532347
Method for forming high quality multiple thickness oxide using high temperature descum Mar 20, 2000 Issued
Array ( [id] => 1459500 [patent_doc_number] => 06391758 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-21 [patent_title] => 'Method of forming solder areas over a lead frame' [patent_app_type] => B1 [patent_app_number] => 09/525717 [patent_app_country] => US [patent_app_date] => 2000-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 7 [patent_no_of_words] => 1716 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/391/06391758.pdf [firstpage_image] =>[orig_patent_app_number] => 09525717 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/525717
Method of forming solder areas over a lead frame Mar 13, 2000 Issued
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