
Charles D. Adams
Examiner (ID: 12897, Phone: (571)272-3938 , Office: P/2164 )
| Most Active Art Unit | 2152 |
| Art Unit(s) | 2152, 2164 |
| Total Applications | 513 |
| Issued Applications | 192 |
| Pending Applications | 71 |
| Abandoned Applications | 267 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8300089
[patent_doc_number] => 20120182652
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-19
[patent_title] => 'ESD PROTECTION STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 13/104031
[patent_app_country] => US
[patent_app_date] => 2011-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3972
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13104031
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/104031 | ESD PROTECTION STRUCTURE | May 9, 2011 | Abandoned |
Array
(
[id] => 8981921
[patent_doc_number] => 08513034
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-08-20
[patent_title] => 'Method of manufacturing layered chip package'
[patent_app_type] => utility
[patent_app_number] => 13/064880
[patent_app_country] => US
[patent_app_date] => 2011-04-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 34
[patent_figures_cnt] => 43
[patent_no_of_words] => 21166
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 386
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13064880
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/064880 | Method of manufacturing layered chip package | Apr 21, 2011 | Issued |
Array
(
[id] => 8625076
[patent_doc_number] => 08357570
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-01-22
[patent_title] => 'Pixel structure and method for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 13/052114
[patent_app_country] => US
[patent_app_date] => 2011-03-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 26
[patent_no_of_words] => 6171
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 224
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13052114
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/052114 | Pixel structure and method for fabricating the same | Mar 20, 2011 | Issued |
Array
(
[id] => 8166222
[patent_doc_number] => 20120104495
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-03
[patent_title] => 'SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/144182
[patent_app_country] => US
[patent_app_date] => 2011-03-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4139
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0104/20120104495.pdf
[firstpage_image] =>[orig_patent_app_number] => 13144182
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/144182 | Semiconductor structure and method for manufacturing the same | Mar 3, 2011 | Issued |
Array
(
[id] => 8932512
[patent_doc_number] => 08492210
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-23
[patent_title] => 'Transistor, semiconductor device comprising the transistor and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 13/144906
[patent_app_country] => US
[patent_app_date] => 2011-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 7383
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13144906
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/144906 | Transistor, semiconductor device comprising the transistor and method for manufacturing the same | Feb 24, 2011 | Issued |
Array
(
[id] => 6041578
[patent_doc_number] => 20110203655
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-08-25
[patent_title] => 'PHOTOVOLTAIC DEVICE PROTECTION LAYER'
[patent_app_type] => utility
[patent_app_number] => 13/025439
[patent_app_country] => US
[patent_app_date] => 2011-02-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3025
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0203/20110203655.pdf
[firstpage_image] =>[orig_patent_app_number] => 13025439
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/025439 | PHOTOVOLTAIC DEVICE PROTECTION LAYER | Feb 10, 2011 | Abandoned |
Array
(
[id] => 4612898
[patent_doc_number] => 07989295
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2011-08-02
[patent_title] => 'Method of manufacturing semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 13/014190
[patent_app_country] => US
[patent_app_date] => 2011-01-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 28
[patent_no_of_words] => 9151
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/989/07989295.pdf
[firstpage_image] =>[orig_patent_app_number] => 13014190
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/014190 | Method of manufacturing semiconductor device | Jan 25, 2011 | Issued |
Array
(
[id] => 6106125
[patent_doc_number] => 20110186955
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-08-04
[patent_title] => 'METHOD OF PRODUCING PHOTOELECTRIC CONVERSION DEVICE AND PHOTOELECTRIC CONVERSION DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/011196
[patent_app_country] => US
[patent_app_date] => 2011-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 8753
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0186/20110186955.pdf
[firstpage_image] =>[orig_patent_app_number] => 13011196
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/011196 | METHOD OF PRODUCING PHOTOELECTRIC CONVERSION DEVICE AND PHOTOELECTRIC CONVERSION DEVICE | Jan 20, 2011 | Abandoned |
Array
(
[id] => 5955837
[patent_doc_number] => 20110180884
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-07-28
[patent_title] => 'METHODS, APPARATUSES, AND SYSTEMS FOR MICROMECHANICAL GAS CHEMICAL SENSING CAPACITOR'
[patent_app_type] => utility
[patent_app_number] => 13/010954
[patent_app_country] => US
[patent_app_date] => 2011-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 7244
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0180/20110180884.pdf
[firstpage_image] =>[orig_patent_app_number] => 13010954
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/010954 | Methods, apparatuses, and systems for micromechanical gas chemical sensing capacitor | Jan 20, 2011 | Issued |
Array
(
[id] => 9086941
[patent_doc_number] => 08558371
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-10-15
[patent_title] => 'Method for wafer level package and semiconductor device fabricated using the same'
[patent_app_type] => utility
[patent_app_number] => 13/011286
[patent_app_country] => US
[patent_app_date] => 2011-01-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 18
[patent_no_of_words] => 4264
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13011286
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/011286 | Method for wafer level package and semiconductor device fabricated using the same | Jan 20, 2011 | Issued |
Array
(
[id] => 6055180
[patent_doc_number] => 20110111540
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-05-12
[patent_title] => 'METHOD OF FABRICATING FLAT PANEL DISPLAY'
[patent_app_type] => utility
[patent_app_number] => 13/007121
[patent_app_country] => US
[patent_app_date] => 2011-01-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5997
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0111/20110111540.pdf
[firstpage_image] =>[orig_patent_app_number] => 13007121
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/007121 | METHOD OF FABRICATING FLAT PANEL DISPLAY | Jan 13, 2011 | Abandoned |
Array
(
[id] => 7750279
[patent_doc_number] => 20120025198
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-02
[patent_title] => 'THIN FILM TRANSISTOR ARRAY SUBSTRATE'
[patent_app_type] => utility
[patent_app_number] => 12/983327
[patent_app_country] => US
[patent_app_date] => 2011-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5039
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0025/20120025198.pdf
[firstpage_image] =>[orig_patent_app_number] => 12983327
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/983327 | THIN FILM TRANSISTOR ARRAY SUBSTRATE | Jan 2, 2011 | Abandoned |
Array
(
[id] => 9286728
[patent_doc_number] => 08643059
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-02-04
[patent_title] => 'Substrate structure and method of manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 12/983414
[patent_app_country] => US
[patent_app_date] => 2011-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 9
[patent_no_of_words] => 4277
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12983414
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/983414 | Substrate structure and method of manufacturing the same | Jan 2, 2011 | Issued |
Array
(
[id] => 8274844
[patent_doc_number] => 20120168714
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-05
[patent_title] => 'VERTICAL LIGHT EMITTING DIODE (VLED) DIE AND METHOD OF FABRICATION'
[patent_app_type] => utility
[patent_app_number] => 12/983436
[patent_app_country] => US
[patent_app_date] => 2011-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4132
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12983436
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/983436 | VERTICAL LIGHT EMITTING DIODE (VLED) DIE AND METHOD OF FABRICATION | Jan 2, 2011 | Abandoned |
Array
(
[id] => 8274990
[patent_doc_number] => 20120168866
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-07-05
[patent_title] => 'STRUCTURE, METHOD AND SYSTEM FOR COMPLEMENTARY STRAIN FILL FOR INTEGRATED CIRCUIT CHIPS'
[patent_app_type] => utility
[patent_app_number] => 12/983353
[patent_app_country] => US
[patent_app_date] => 2011-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 5223
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12983353
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/983353 | Structure, method and system for complementary strain fill for integrated circuit chips | Jan 2, 2011 | Issued |
Array
(
[id] => 6169753
[patent_doc_number] => 20110175104
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-07-21
[patent_title] => 'SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/983578
[patent_app_country] => US
[patent_app_date] => 2011-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 19415
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0175/20110175104.pdf
[firstpage_image] =>[orig_patent_app_number] => 12983578
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/983578 | Semiconductor device | Jan 2, 2011 | Issued |
Array
(
[id] => 9530578
[patent_doc_number] => 08754455
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-06-17
[patent_title] => 'Junction field effect transistor structure with P-type silicon germanium or silicon germanium carbide gate(s) and method of forming the structure'
[patent_app_type] => utility
[patent_app_number] => 12/983489
[patent_app_country] => US
[patent_app_date] => 2011-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 22
[patent_no_of_words] => 8973
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12983489
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/983489 | Junction field effect transistor structure with P-type silicon germanium or silicon germanium carbide gate(s) and method of forming the structure | Jan 2, 2011 | Issued |
Array
(
[id] => 10898798
[patent_doc_number] => 08922020
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-30
[patent_title] => 'Integrated circuit pattern and method'
[patent_app_type] => utility
[patent_app_number] => 12/983832
[patent_app_country] => US
[patent_app_date] => 2011-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 57
[patent_no_of_words] => 5524
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 174
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12983832
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/983832 | Integrated circuit pattern and method | Jan 2, 2011 | Issued |
Array
(
[id] => 9286099
[patent_doc_number] => 08642428
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-02-04
[patent_title] => 'Semiconductor device including line-type active region and method for manufacturing the same'
[patent_app_type] => utility
[patent_app_number] => 12/983119
[patent_app_country] => US
[patent_app_date] => 2010-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 10
[patent_no_of_words] => 3304
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12983119
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/983119 | Semiconductor device including line-type active region and method for manufacturing the same | Dec 30, 2010 | Issued |
Array
(
[id] => 9227898
[patent_doc_number] => 08633568
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-21
[patent_title] => 'Multi-chip package with improved signal transmission'
[patent_app_type] => utility
[patent_app_number] => 12/983211
[patent_app_country] => US
[patent_app_date] => 2010-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 7
[patent_no_of_words] => 2048
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 228
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12983211
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/983211 | Multi-chip package with improved signal transmission | Dec 30, 2010 | Issued |