Search

Charles D Hanson

Examiner (ID: 5744, Phone: (571)272-4312 , Office: P/2918 )

Most Active Art Unit
2918
Art Unit(s)
2916, 2918
Total Applications
2989
Issued Applications
2920
Pending Applications
28
Abandoned Applications
40

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11446433 [patent_doc_number] => 20170047455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-16 [patent_title] => 'SENSING CHIP PACKAGE AND A MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 15/231590 [patent_app_country] => US [patent_app_date] => 2016-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5017 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15231590 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/231590
SENSING CHIP PACKAGE AND A MANUFACTURING METHOD THEREOF Aug 7, 2016 Abandoned
Array ( [id] => 16372371 [patent_doc_number] => 10804137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => SOI substrate manufacturing method and SOI substrate [patent_app_type] => utility [patent_app_number] => 15/214257 [patent_app_country] => US [patent_app_date] => 2016-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 6310 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15214257 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/214257
SOI substrate manufacturing method and SOI substrate Jul 18, 2016 Issued
Array ( [id] => 11118176 [patent_doc_number] => 20160315150 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-27 [patent_title] => 'Method and Power Semiconductor Device Having an Insulating Region Arranged in an Edge Termination Region' [patent_app_type] => utility [patent_app_number] => 15/199135 [patent_app_country] => US [patent_app_date] => 2016-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 11175 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15199135 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/199135
Method and power semiconductor device having an insulating region arranged in an edge termination region Jun 29, 2016 Issued
Array ( [id] => 13667685 [patent_doc_number] => 10164024 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-25 [patent_title] => Heterostructures for semiconductor devices and methods of forming the same [patent_app_type] => utility [patent_app_number] => 15/189913 [patent_app_country] => US [patent_app_date] => 2016-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 21 [patent_no_of_words] => 6848 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15189913 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/189913
Heterostructures for semiconductor devices and methods of forming the same Jun 21, 2016 Issued
Array ( [id] => 16372671 [patent_doc_number] => 10804437 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-10-13 [patent_title] => Light emitting diode chip having distributed Bragg reflector [patent_app_type] => utility [patent_app_number] => 15/767284 [patent_app_country] => US [patent_app_date] => 2016-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 10911 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15767284 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/767284
Light emitting diode chip having distributed Bragg reflector Jun 16, 2016 Issued
Array ( [id] => 13689273 [patent_doc_number] => 20170355591 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-14 [patent_title] => MICROELECTROMECHANICAL DEVICE AND A METHOD OF MANUFACTURING A MICROELECTROMECHANICAL DEVICE [patent_app_type] => utility [patent_app_number] => 15/176235 [patent_app_country] => US [patent_app_date] => 2016-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12595 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15176235 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/176235
MICROELECTROMECHANICAL DEVICE AND A METHOD OF MANUFACTURING A MICROELECTROMECHANICAL DEVICE Jun 7, 2016 Abandoned
Array ( [id] => 11087628 [patent_doc_number] => 20160284596 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-29 [patent_title] => 'PARTIALLY RECESSED CHANNEL CORE TRANSISTORS IN REPLACEMENT GATE FLOW' [patent_app_type] => utility [patent_app_number] => 15/174018 [patent_app_country] => US [patent_app_date] => 2016-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3939 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15174018 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/174018
Partially recessed channel core transistors in replacement gate flow Jun 5, 2016 Issued
Array ( [id] => 12990529 [patent_doc_number] => 20170345921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-30 [patent_title] => POWER DEVICE AND METHOD FOR FABRICATING THEREOF [patent_app_type] => utility [patent_app_number] => 15/168114 [patent_app_country] => US [patent_app_date] => 2016-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5745 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15168114 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/168114
POWER DEVICE AND METHOD FOR FABRICATING THEREOF May 29, 2016 Abandoned
Array ( [id] => 15169947 [patent_doc_number] => 10490477 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-11-26 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 15/168242 [patent_app_country] => US [patent_app_date] => 2016-05-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 46 [patent_figures_cnt] => 46 [patent_no_of_words] => 12492 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15168242 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/168242
Semiconductor device May 29, 2016 Issued
Array ( [id] => 12027062 [patent_doc_number] => 20170317161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'METHOD OF FORMING A CAPACITOR STRUCTURE AND CAPACITOR STRUCTURE' [patent_app_type] => utility [patent_app_number] => 15/142332 [patent_app_country] => US [patent_app_date] => 2016-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5147 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15142332 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/142332
Method of forming a capacitor structure and capacitor structure Apr 28, 2016 Issued
Array ( [id] => 12469035 [patent_doc_number] => 09988260 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-06-05 [patent_title] => Rough MEMS surface [patent_app_type] => utility [patent_app_number] => 15/142381 [patent_app_country] => US [patent_app_date] => 2016-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 4859 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15142381 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/142381
Rough MEMS surface Apr 28, 2016 Issued
Array ( [id] => 12026844 [patent_doc_number] => 20170316943 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'Hybrid Doping Profile' [patent_app_type] => utility [patent_app_number] => 15/141951 [patent_app_country] => US [patent_app_date] => 2016-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6393 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15141951 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/141951
Hybrid doping profile Apr 28, 2016 Issued
Array ( [id] => 11125517 [patent_doc_number] => 20160322491 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-11-03 [patent_title] => 'Semiconductor Devices and Methods for Forming a Semiconductor Device' [patent_app_type] => utility [patent_app_number] => 15/142211 [patent_app_country] => US [patent_app_date] => 2016-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10062 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15142211 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/142211
Semiconductor Devices and Methods for Forming a Semiconductor Device Apr 28, 2016 Abandoned
Array ( [id] => 12027043 [patent_doc_number] => 20170317142 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-11-02 [patent_title] => 'SIDEWALL INSULATED RESISTIVE MEMORY DEVICES' [patent_app_type] => utility [patent_app_number] => 15/142344 [patent_app_country] => US [patent_app_date] => 2016-04-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7443 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15142344 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/142344
SIDEWALL INSULATED RESISTIVE MEMORY DEVICES Apr 28, 2016 Abandoned
Array ( [id] => 14063967 [patent_doc_number] => 10236288 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-19 [patent_title] => Integrated on-chip junction capacitor for power management integrated circuit device [patent_app_type] => utility [patent_app_number] => 15/141816 [patent_app_country] => US [patent_app_date] => 2016-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 6305 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15141816 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/141816
Integrated on-chip junction capacitor for power management integrated circuit device Apr 27, 2016 Issued
Array ( [id] => 17289109 [patent_doc_number] => 11205670 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-21 [patent_title] => Alignment of multiple image dice in package [patent_app_type] => utility [patent_app_number] => 16/093544 [patent_app_country] => US [patent_app_date] => 2016-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 4491 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16093544 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/093544
Alignment of multiple image dice in package Apr 14, 2016 Issued
Array ( [id] => 13996905 [patent_doc_number] => 20190067610 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-28 [patent_title] => PASSIVATED THIN FILM TRANSISTOR COMPONENT [patent_app_type] => utility [patent_app_number] => 16/070788 [patent_app_country] => US [patent_app_date] => 2016-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9534 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 267 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16070788 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/070788
PASSIVATED THIN FILM TRANSISTOR COMPONENT Mar 30, 2016 Abandoned
Array ( [id] => 13929367 [patent_doc_number] => 20190048199 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-02-14 [patent_title] => METHOD OF MAKING HYDROPHOBIC SILICA PARTICLES [patent_app_type] => utility [patent_app_number] => 16/078918 [patent_app_country] => US [patent_app_date] => 2016-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3054 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16078918 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/078918
METHOD OF MAKING HYDROPHOBIC SILICA PARTICLES Mar 30, 2016 Abandoned
Array ( [id] => 11725370 [patent_doc_number] => 09698237 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-04 [patent_title] => 'Lateral PNP bipolar transistor with narrow trench emitter' [patent_app_type] => utility [patent_app_number] => 15/057461 [patent_app_country] => US [patent_app_date] => 2016-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 49 [patent_no_of_words] => 9118 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 372 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15057461 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/057461
Lateral PNP bipolar transistor with narrow trench emitter Feb 29, 2016 Issued
Array ( [id] => 11422732 [patent_doc_number] => 20170030876 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'Combinational Array Gas Sensor' [patent_app_type] => utility [patent_app_number] => 15/056859 [patent_app_country] => US [patent_app_date] => 2016-02-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 10292 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15056859 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/056859
Combinational Array Gas Sensor Feb 28, 2016 Abandoned
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