Search

Charles E. Cooley

Examiner (ID: 18585, Phone: (571)272-1139 , Office: P/1774 )

Most Active Art Unit
1774
Art Unit(s)
1797, 1754, 3405, 2402, 1774, 1723
Total Applications
4068
Issued Applications
3145
Pending Applications
298
Abandoned Applications
660

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17971294 [patent_doc_number] => 11488842 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-11-01 [patent_title] => Method of making semiconductor device package including conformal metal cap contacting each semiconductor die [patent_app_type] => utility [patent_app_number] => 16/705334 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 9200 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 402 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16705334 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/705334
Method of making semiconductor device package including conformal metal cap contacting each semiconductor die Dec 5, 2019 Issued
Array ( [id] => 15745955 [patent_doc_number] => 20200111867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-09 [patent_title] => Isolation Features and Methods of Fabricating the Same [patent_app_type] => utility [patent_app_number] => 16/704138 [patent_app_country] => US [patent_app_date] => 2019-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9333 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16704138 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/704138
Isolation features and methods of fabricating the same Dec 4, 2019 Issued
Array ( [id] => 17908822 [patent_doc_number] => 11462687 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-10-04 [patent_title] => Display backplate and fabricating method thereof, and display apparatus [patent_app_type] => utility [patent_app_number] => 16/764081 [patent_app_country] => US [patent_app_date] => 2019-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 6563 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16764081 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/764081
Display backplate and fabricating method thereof, and display apparatus Dec 3, 2019 Issued
Array ( [id] => 16700198 [patent_doc_number] => 10950810 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-16 [patent_title] => Photoelectric conversion element, and method and apparatus for manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/690369 [patent_app_country] => US [patent_app_date] => 2019-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 30 [patent_no_of_words] => 11067 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16690369 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/690369
Photoelectric conversion element, and method and apparatus for manufacturing the same Nov 20, 2019 Issued
Array ( [id] => 17078194 [patent_doc_number] => 11114610 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-09-07 [patent_title] => Semiconductor structure, electrode structure and method of forming the same [patent_app_type] => utility [patent_app_number] => 16/668775 [patent_app_country] => US [patent_app_date] => 2019-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 5501 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16668775 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/668775
Semiconductor structure, electrode structure and method of forming the same Oct 29, 2019 Issued
Array ( [id] => 16796101 [patent_doc_number] => 20210125918 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-04-29 [patent_title] => WAFER LEVEL STACKED STRUCTURES HAVING INTEGRATED PASSIVE FEATURES [patent_app_type] => utility [patent_app_number] => 16/666016 [patent_app_country] => US [patent_app_date] => 2019-10-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7599 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16666016 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/666016
Wafer level stacked structures having integrated passive features Oct 27, 2019 Issued
Array ( [id] => 17210760 [patent_doc_number] => 11171137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-09 [patent_title] => Method of making FinFET CMOS device including single diffusion break in each of NMOS and PMOS regions [patent_app_type] => utility [patent_app_number] => 16/594054 [patent_app_country] => US [patent_app_date] => 2019-10-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3590 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16594054 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/594054
Method of making FinFET CMOS device including single diffusion break in each of NMOS and PMOS regions Oct 5, 2019 Issued
Array ( [id] => 15598041 [patent_doc_number] => 20200075555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-05 [patent_title] => STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH PARTITIONED LOGIC AND ASSOCIATED SYSTEMS AND METHODS [patent_app_type] => utility [patent_app_number] => 16/592420 [patent_app_country] => US [patent_app_date] => 2019-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4849 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16592420 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/592420
Stacked semiconductor die assemblies with partitioned logic and associated systems and methods Oct 2, 2019 Issued
Array ( [id] => 15442849 [patent_doc_number] => 20200035608 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => InFO-POP structures with TIVs Having Cavities [patent_app_type] => utility [patent_app_number] => 16/590908 [patent_app_country] => US [patent_app_date] => 2019-10-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16590908 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/590908
InFO-POP structures with TIVs having cavities Oct 1, 2019 Issued
Array ( [id] => 15442801 [patent_doc_number] => 20200035584 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-30 [patent_title] => Semiconductor Package and Method [patent_app_type] => utility [patent_app_number] => 16/588345 [patent_app_country] => US [patent_app_date] => 2019-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9868 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16588345 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/588345
Semiconductor package and method Sep 29, 2019 Issued
Array ( [id] => 15363913 [patent_doc_number] => 20200017721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-16 [patent_title] => PROTECTIVE SYSTEMS FOR ELECTRONIC DEVICES [patent_app_type] => utility [patent_app_number] => 16/581567 [patent_app_country] => US [patent_app_date] => 2019-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13158 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16581567 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/581567
PROTECTIVE SYSTEMS FOR ELECTRONIC DEVICES Sep 23, 2019 Abandoned
Array ( [id] => 16529098 [patent_doc_number] => 20200403179 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-24 [patent_title] => OLED DISPLAY PANEL AND OLED DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 16/612433 [patent_app_country] => US [patent_app_date] => 2019-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6678 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16612433 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/612433
OLED DISPLAY PANEL AND OLED DISPLAY DEVICE Sep 22, 2019 Abandoned
Array ( [id] => 17500700 [patent_doc_number] => 11289410 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Integrated circuit packages and methods of forming same [patent_app_type] => utility [patent_app_number] => 16/573017 [patent_app_country] => US [patent_app_date] => 2019-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 9866 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16573017 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/573017
Integrated circuit packages and methods of forming same Sep 16, 2019 Issued
Array ( [id] => 15331965 [patent_doc_number] => 20200006312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-02 [patent_title] => LTHC as Charging Barrier in InFO Package Formation [patent_app_type] => utility [patent_app_number] => 16/569078 [patent_app_country] => US [patent_app_date] => 2019-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16569078 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/569078
LTHC as charging barrier in InFO package formation Sep 11, 2019 Issued
Array ( [id] => 17284140 [patent_doc_number] => 11201183 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-12-14 [patent_title] => Image sensor device and method [patent_app_type] => utility [patent_app_number] => 16/568586 [patent_app_country] => US [patent_app_date] => 2019-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 10 [patent_no_of_words] => 12241 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 264 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16568586 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/568586
Image sensor device and method Sep 11, 2019 Issued
Array ( [id] => 15300597 [patent_doc_number] => 20190393434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-26 [patent_title] => FLEXIBLE DISPLAY MOTHERBOARD AND FLEXIBLE DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 16/562447 [patent_app_country] => US [patent_app_date] => 2019-09-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4497 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16562447 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/562447
FLEXIBLE DISPLAY MOTHERBOARD AND FLEXIBLE DISPLAY PANEL Sep 5, 2019 Abandoned
Array ( [id] => 19244586 [patent_doc_number] => 12015041 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-18 [patent_title] => Solid-state imaging unit and electronic apparatus [patent_app_type] => utility [patent_app_number] => 17/272875 [patent_app_country] => US [patent_app_date] => 2019-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 12553 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17272875 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/272875
Solid-state imaging unit and electronic apparatus Sep 3, 2019 Issued
Array ( [id] => 19139508 [patent_doc_number] => 11974501 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-04-30 [patent_title] => Chalcogen-containing organic compound, organic semiconductor material, organic semiconductor film, and organic field-effect transistor [patent_app_type] => utility [patent_app_number] => 17/270657 [patent_app_country] => US [patent_app_date] => 2019-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10210 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17270657 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/270657
Chalcogen-containing organic compound, organic semiconductor material, organic semiconductor film, and organic field-effect transistor Aug 28, 2019 Issued
Array ( [id] => 16911325 [patent_doc_number] => 11043374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-22 [patent_title] => Silacycloalkane compounds and methods for depositing silicon containing films using same [patent_app_type] => utility [patent_app_number] => 16/549634 [patent_app_country] => US [patent_app_date] => 2019-08-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9705 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16549634 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/549634
Silacycloalkane compounds and methods for depositing silicon containing films using same Aug 22, 2019 Issued
Array ( [id] => 17171667 [patent_doc_number] => 20210325337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => METHOD OF FORMING ION SENSORS [patent_app_type] => utility [patent_app_number] => 17/267754 [patent_app_country] => US [patent_app_date] => 2019-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5670 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17267754 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/267754
METHOD OF FORMING ION SENSORS Aug 15, 2019 Abandoned
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