
Charles E. Cooley
Examiner (ID: 18585, Phone: (571)272-1139 , Office: P/1774 )
| Most Active Art Unit | 1774 |
| Art Unit(s) | 1797, 1754, 3405, 2402, 1774, 1723 |
| Total Applications | 4068 |
| Issued Applications | 3145 |
| Pending Applications | 298 |
| Abandoned Applications | 660 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11990254
[patent_doc_number] => 20170294408
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-12
[patent_title] => 'SEMICONDUCTOR DEVICE THAT INCLUDES A MOLECULAR BONDING LAYER FOR BONDING ELEMENTS'
[patent_app_type] => utility
[patent_app_number] => 15/442319
[patent_app_country] => US
[patent_app_date] => 2017-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 17270
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15442319
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/442319 | SEMICONDUCTOR DEVICE THAT INCLUDES A MOLECULAR BONDING LAYER FOR BONDING ELEMENTS | Feb 23, 2017 | Abandoned |
Array
(
[id] => 13393139
[patent_doc_number] => 20180248112
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-08-30
[patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/442225
[patent_app_country] => US
[patent_app_date] => 2017-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5738
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15442225
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/442225 | Multilayered spacer structure for a magnetic tunneling junction and method of manufacturing | Feb 23, 2017 | Issued |
Array
(
[id] => 11990243
[patent_doc_number] => 20170294398
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-10-12
[patent_title] => 'SEMICONDUCTOR DEVICE THAT INCLUDES A MOLECULAR BONDING LAYER FOR BONDING OF ELEMENTS'
[patent_app_type] => utility
[patent_app_number] => 15/441013
[patent_app_country] => US
[patent_app_date] => 2017-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 17273
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15441013
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/441013 | SEMICONDUCTOR DEVICE THAT INCLUDES A MOLECULAR BONDING LAYER FOR BONDING OF ELEMENTS | Feb 22, 2017 | Abandoned |
Array
(
[id] => 15496543
[patent_doc_number] => 20200048460
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-13
[patent_title] => CURABLE RESIN COMPOSITION, CURED PRODUCT THEREOF, AND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/078552
[patent_app_country] => US
[patent_app_date] => 2017-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 29549
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 233
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16078552
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/078552 | Curable resin composition, cured product thereof, and semiconductor device | Feb 19, 2017 | Issued |
Array
(
[id] => 12596643
[patent_doc_number] => 20180090711
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-03-29
[patent_title] => PHOTOELECTRIC CONVERSION ELEMENT, AND METHOD AND APPARATUS FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/436113
[patent_app_country] => US
[patent_app_date] => 2017-02-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11041
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 66
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15436113
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/436113 | PHOTOELECTRIC CONVERSION ELEMENT, AND METHOD AND APPARATUS FOR MANUFACTURING THE SAME | Feb 16, 2017 | Abandoned |
Array
(
[id] => 15389233
[patent_doc_number] => 10535822
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-01-14
[patent_title] => Molecular and polymeric semiconductors and related devices
[patent_app_type] => utility
[patent_app_number] => 15/430535
[patent_app_country] => US
[patent_app_date] => 2017-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 15
[patent_no_of_words] => 14151
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15430535
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/430535 | Molecular and polymeric semiconductors and related devices | Feb 11, 2017 | Issued |
Array
(
[id] => 12257105
[patent_doc_number] => 09929255
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-27
[patent_title] => 'Robust gate spacer for semiconductor devices'
[patent_app_type] => utility
[patent_app_number] => 15/430079
[patent_app_country] => US
[patent_app_date] => 2017-02-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 33
[patent_no_of_words] => 5376
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 195
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15430079
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/430079 | Robust gate spacer for semiconductor devices | Feb 9, 2017 | Issued |
Array
(
[id] => 13057031
[patent_doc_number] => 10049912
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-08-14
[patent_title] => Method of manufacturing a semiconductor device having a vertical edge termination structure
[patent_app_type] => utility
[patent_app_number] => 15/424118
[patent_app_country] => US
[patent_app_date] => 2017-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 28
[patent_no_of_words] => 7532
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15424118
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/424118 | Method of manufacturing a semiconductor device having a vertical edge termination structure | Feb 2, 2017 | Issued |
Array
(
[id] => 15250065
[patent_doc_number] => 10510561
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-12-17
[patent_title] => Semiconductor device package including conformal metal cap contacting each semiconductor die
[patent_app_type] => utility
[patent_app_number] => 15/418065
[patent_app_country] => US
[patent_app_date] => 2017-01-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 8623
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 181
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15418065
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/418065 | Semiconductor device package including conformal metal cap contacting each semiconductor die | Jan 26, 2017 | Issued |
Array
(
[id] => 11967355
[patent_doc_number] => 20170271508
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-09-21
[patent_title] => 'SEMICONDUCTOR DEVICES'
[patent_app_type] => utility
[patent_app_number] => 15/397011
[patent_app_country] => US
[patent_app_date] => 2017-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 7364
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15397011
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/397011 | Vertical transistor having a semiconductor pillar penetrating a silicide formed on the substrate surface | Jan 2, 2017 | Issued |
Array
(
[id] => 15200605
[patent_doc_number] => 10497807
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-12-03
[patent_title] => PMOS transistor and fabrication method thereof
[patent_app_type] => utility
[patent_app_number] => 15/397081
[patent_app_country] => US
[patent_app_date] => 2017-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 5444
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 344
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15397081
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/397081 | PMOS transistor and fabrication method thereof | Jan 2, 2017 | Issued |
Array
(
[id] => 12054561
[patent_doc_number] => 20170330905
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-16
[patent_title] => 'IMAGE SENSOR'
[patent_app_type] => utility
[patent_app_number] => 15/397065
[patent_app_country] => US
[patent_app_date] => 2017-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 9488
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15397065
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/397065 | IMAGE SENSOR | Jan 2, 2017 | Abandoned |
Array
(
[id] => 14707085
[patent_doc_number] => 10381302
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-08-13
[patent_title] => Semiconductor package with embedded MIM capacitor, and method of fabricating thereof
[patent_app_type] => utility
[patent_app_number] => 15/396817
[patent_app_country] => US
[patent_app_date] => 2017-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 15
[patent_no_of_words] => 3729
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 361
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15396817
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/396817 | Semiconductor package with embedded MIM capacitor, and method of fabricating thereof | Jan 2, 2017 | Issued |
Array
(
[id] => 12896758
[patent_doc_number] => 20180190761
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-07-05
[patent_title] => MIM CAPACITOR WITH ENHANCED CAPACITANCE
[patent_app_type] => utility
[patent_app_number] => 15/396828
[patent_app_country] => US
[patent_app_date] => 2017-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2037
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15396828
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/396828 | MIM CAPACITOR WITH ENHANCED CAPACITANCE | Jan 2, 2017 | Abandoned |
Array
(
[id] => 12366876
[patent_doc_number] => 09957158
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-05-01
[patent_title] => Micromechanical pressure sensor
[patent_app_type] => utility
[patent_app_number] => 15/396867
[patent_app_country] => US
[patent_app_date] => 2017-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1550
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15396867
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/396867 | Micromechanical pressure sensor | Jan 2, 2017 | Issued |
Array
(
[id] => 16308702
[patent_doc_number] => 10777510
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-09-15
[patent_title] => Semiconductor device including dummy via anchored to dummy metal layer
[patent_app_type] => utility
[patent_app_number] => 15/396909
[patent_app_country] => US
[patent_app_date] => 2017-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 26
[patent_no_of_words] => 4950
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 166
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15396909
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/396909 | Semiconductor device including dummy via anchored to dummy metal layer | Jan 2, 2017 | Issued |
Array
(
[id] => 12779644
[patent_doc_number] => 20180151716
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-05-31
[patent_title] => SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 15/396900
[patent_app_country] => US
[patent_app_date] => 2017-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6334
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15396900
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/396900 | SEMICONDUCTOR DEVICE AND FORMING METHOD THEREOF | Jan 2, 2017 | Abandoned |
Array
(
[id] => 11869605
[patent_doc_number] => 20170236890
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-08-17
[patent_title] => 'DISPLAY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/396775
[patent_app_country] => US
[patent_app_date] => 2017-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 9505
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15396775
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/396775 | Display device | Jan 1, 2017 | Issued |
Array
(
[id] => 13239837
[patent_doc_number] => 10133114
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-11-20
[patent_title] => Display device having a light blocking pattern
[patent_app_type] => utility
[patent_app_number] => 15/396781
[patent_app_country] => US
[patent_app_date] => 2017-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 8255
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 365
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15396781
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/396781 | Display device having a light blocking pattern | Jan 1, 2017 | Issued |
Array
(
[id] => 12990049
[patent_doc_number] => 20170345754
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-30
[patent_title] => THREE-DIMENSIONAL INDUCTOR STRUCTURE AND STACKED SEMICONDUCTOR DEVICE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 15/396633
[patent_app_country] => US
[patent_app_date] => 2016-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9475
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15396633
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/396633 | THREE-DIMENSIONAL INDUCTOR STRUCTURE AND STACKED SEMICONDUCTOR DEVICE INCLUDING THE SAME | Dec 30, 2016 | Abandoned |