
Charles E. Cooley
Examiner (ID: 18585, Phone: (571)272-1139 , Office: P/1774 )
| Most Active Art Unit | |
| Art Unit(s) | |
| Total Applications | |
| Issued Applications | |
| Pending Applications | |
| Abandoned Applications |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
| 90/010022 | MULTI-CHIP DEVICE AND METHOD OF FABRICATION EMPLOYING LEADS OVER AND UNDER PROCESSES | Dec 5, 2007 | Issued |
| 90/008813 | ELECTRONIC CIRCUIT | Nov 13, 2007 | Issued |
| 90/008825 | ELECTRONIC CIRCUIT | Nov 13, 2007 | Issued |
| 90/008914 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE | Nov 4, 2007 | Issued |
| 90/008912 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE FOR PREVENTING RISING-UP OF SILISIDE | Nov 4, 2007 | Issued |
| 90/010044 | TELEPHONE INTERFACE CALL PROCESSING SYSTEM WITH CALL SELECTIVITY | Nov 4, 2007 | Issued |
| 90/008882 | SEMICONDUCTOR DEVICE HAVING EXTERNALLY SETTABLE OPERATION MODE | Oct 17, 2007 | Pending |
| 95/001006 | SUBSTRATE WITHIN A NI/AU STRUCTURE ELECTROPLATED ON ELECTRICAL CONTACT PADS AND METHOD FOR FABRICATING THE SAME | Sep 18, 2007 | Issued |
| 90/008696 | SEMICONDUCTOR CHIP PACKAGE WITH CENTER CONTACTS | Jun 10, 2007 | Issued |
| 90/008629 | WIRE, LOOP, SEMICONDUCTOR DEVICE HAVING SAME, WIRE BONDING METHOD AND WIRE BONDING APPARATUS | May 3, 2007 | Issued |
| 90/008321 | SEMICONDUCTOR MANUFACTURING APPARATUS FOR PHOTOLITHOGRAPHIC PROCESS | Feb 14, 2007 | Issued |
| 90/008483 | FACE-UP SEMICONDUCTOR CHIP ASSEMBLY | Feb 8, 2007 | Issued |
| 90/008485 | SEMICONDUCTOR CHIP PACKAGE WITH CENTER CONTACTS | Feb 8, 2007 | Issued |
| 95/000194 | METHOD OF FABRICATING CMOS INVERTER AND INTEGRATED CIRCUITS UTILIZING STRAINED SILICON SURFACE CHANNEL MOSFETS | Jan 11, 2007 | Issued |
| 90/008325 | TELEPHONE INTERFACE CALL PROCESSING SYSTEM WITH CALL SELECTIVITY | Nov 12, 2006 | Issued |
| 95/000177 | LOW THREADING DISLOCATION DENSITY RELAXED MISMATCHED EPILAYERS WITHOUT HIGH TEMPERATURE GROWTH | Nov 8, 2006 | Issued |
| 90/008219 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE | Oct 15, 2006 | Issued |
| 95/000180 | HETEROINTEGRATION OF MATERIALS USING DEPOSITION AND BONDING | Sep 27, 2006 | Issued |
| 95/000149 | LOW THREADING DISLOCATION DENSITY RELAXED MISMATCHED EPILAYERS WITHOUT HIGH TEMPERATURE GROWTH | Aug 20, 2006 | Issued |
| 95/000174 | BURIED-CHANNEL DEVICES AND SUBSTRATES FOR FABRICATION OF SEMICONDUCTOR-BASED DEVICES | Aug 15, 2006 | Issued |