Search

Charles E. Cooley

Examiner (ID: 18585, Phone: (571)272-1139 , Office: P/1774 )

Most Active Art Unit
1774
Art Unit(s)
1797, 1754, 3405, 2402, 1774, 1723
Total Applications
4068
Issued Applications
3145
Pending Applications
298
Abandoned Applications
660

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7451352 [patent_doc_number] => 20040099889 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-27 [patent_title] => 'Process for fabricating a semiconductor device having an insulating layer formed over a semiconductor substrate' [patent_app_type] => new [patent_app_number] => 10/306565 [patent_app_country] => US [patent_app_date] => 2002-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5151 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0099/20040099889.pdf [firstpage_image] =>[orig_patent_app_number] => 10306565 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/306565
Process for fabricating a semiconductor device having an insulating layer formed over a semiconductor substrate Nov 26, 2002 Abandoned
Array ( [id] => 6641560 [patent_doc_number] => 20030075108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-24 [patent_title] => 'Method and apparatus for dry/catalytic-wet steam oxidation of silicon' [patent_app_type] => new [patent_app_number] => 10/301323 [patent_app_country] => US [patent_app_date] => 2002-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3702 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 59 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0075/20030075108.pdf [firstpage_image] =>[orig_patent_app_number] => 10301323 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/301323
Method and apparatus for dry/catalytic-wet steam oxidation of silicon Nov 19, 2002 Abandoned
Array ( [id] => 1130451 [patent_doc_number] => 06787441 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-07 [patent_title] => 'Method for pretreating a polymer substrate using an ion beam for subsequent deposition of indium oxide or indium tin oxide' [patent_app_type] => B1 [patent_app_number] => 10/182986 [patent_app_country] => US [patent_app_date] => 2002-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 3372 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/787/06787441.pdf [firstpage_image] =>[orig_patent_app_number] => 10182986 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/182986
Method for pretreating a polymer substrate using an ion beam for subsequent deposition of indium oxide or indium tin oxide Nov 12, 2002 Issued
Array ( [id] => 6858912 [patent_doc_number] => 20030089920 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-05-15 [patent_title] => 'Bistable molecular mechanical devices with an appended rotor activated by an electric field for electronic switching, gating and memory applications' [patent_app_type] => new [patent_app_number] => 10/290757 [patent_app_country] => US [patent_app_date] => 2002-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5684 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0089/20030089920.pdf [firstpage_image] =>[orig_patent_app_number] => 10290757 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/290757
Bistable molecular mechanical devices with an appended rotor activated by an electric field for electronic switching, gating and memory applications Nov 6, 2002 Abandoned
Array ( [id] => 6720980 [patent_doc_number] => 20030054669 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-20 [patent_title] => 'Amorphous metal oxide gate dielectric structure and method thereof' [patent_app_type] => new [patent_app_number] => 10/286618 [patent_app_country] => US [patent_app_date] => 2002-11-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2570 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0054/20030054669.pdf [firstpage_image] =>[orig_patent_app_number] => 10286618 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/286618
Amorphous metal oxide gate dielectric structure and method thereof Oct 31, 2002 Abandoned
Array ( [id] => 6837185 [patent_doc_number] => 20030034525 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-20 [patent_title] => 'Method of increasing the conductivity of a transparent conductive layer' [patent_app_type] => new [patent_app_number] => 10/265877 [patent_app_country] => US [patent_app_date] => 2002-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4215 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 10 [patent_words_short_claim] => 17 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20030034525.pdf [firstpage_image] =>[orig_patent_app_number] => 10265877 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/265877
Active plate for a display device having a conductive layer with increased conductivity Oct 6, 2002 Issued
Array ( [id] => 6686408 [patent_doc_number] => 20030030131 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-02-13 [patent_title] => 'Semiconductor package apparatus and method' [patent_app_type] => new [patent_app_number] => 10/262848 [patent_app_country] => US [patent_app_date] => 2002-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 5469 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0030/20030030131.pdf [firstpage_image] =>[orig_patent_app_number] => 10262848 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/262848
Semiconductor package apparatus and method Oct 2, 2002 Abandoned
Array ( [id] => 6781153 [patent_doc_number] => 20030062600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-03 [patent_title] => 'Process for optimizing mechanical strength of nanoporous silica' [patent_app_type] => new [patent_app_number] => 10/260871 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6475 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0062/20030062600.pdf [firstpage_image] =>[orig_patent_app_number] => 10260871 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/260871
Process for optimizing mechanical strength of nanoporous silica Sep 29, 2002 Abandoned
Array ( [id] => 1112916 [patent_doc_number] => 06803283 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-12 [patent_title] => 'Method to code flashROM using LDD and source/drain implant' [patent_app_type] => B1 [patent_app_number] => 10/261345 [patent_app_country] => US [patent_app_date] => 2002-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 4017 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/803/06803283.pdf [firstpage_image] =>[orig_patent_app_number] => 10261345 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/261345
Method to code flashROM using LDD and source/drain implant Sep 29, 2002 Issued
Array ( [id] => 6817883 [patent_doc_number] => 20030068841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-04-10 [patent_title] => 'Process of producing semiconductor device and resin composition sheet used therefor' [patent_app_type] => new [patent_app_number] => 10/253426 [patent_app_country] => US [patent_app_date] => 2002-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5727 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 21 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20030068841.pdf [firstpage_image] =>[orig_patent_app_number] => 10253426 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/253426
Process of producing semiconductor device and resin composition sheet used therefor Sep 24, 2002 Abandoned
Array ( [id] => 6753463 [patent_doc_number] => 20030001239 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-02 [patent_title] => 'Porous materials' [patent_app_type] => new [patent_app_number] => 10/217120 [patent_app_country] => US [patent_app_date] => 2002-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 12078 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20030001239.pdf [firstpage_image] =>[orig_patent_app_number] => 10217120 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/217120
Porous materials Aug 11, 2002 Abandoned
Array ( [id] => 1212580 [patent_doc_number] => 06709876 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2004-03-23 [patent_title] => 'Method for detecting removal of organic material from a semiconductor device in a manufacturing process' [patent_app_type] => B2 [patent_app_number] => 10/215226 [patent_app_country] => US [patent_app_date] => 2002-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 2963 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/709/06709876.pdf [firstpage_image] =>[orig_patent_app_number] => 10215226 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/215226
Method for detecting removal of organic material from a semiconductor device in a manufacturing process Aug 7, 2002 Issued
Array ( [id] => 6327541 [patent_doc_number] => 20020197865 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-26 [patent_title] => 'Method for forming a capping layer on a copper interconnect' [patent_app_type] => new [patent_app_number] => 10/212234 [patent_app_country] => US [patent_app_date] => 2002-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1773 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20020197865.pdf [firstpage_image] =>[orig_patent_app_number] => 10212234 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/212234
Method for forming a capping layer on a copper interconnect Aug 5, 2002 Abandoned
Array ( [id] => 6327243 [patent_doc_number] => 20020197784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-26 [patent_title] => 'Method for forming a gate dielectric layer by a single wafer process' [patent_app_type] => new [patent_app_number] => 10/212224 [patent_app_country] => US [patent_app_date] => 2002-08-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2868 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0197/20020197784.pdf [firstpage_image] =>[orig_patent_app_number] => 10212224 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/212224
Method for forming a gate dielectric layer by a single wafer process Aug 5, 2002 Abandoned
Array ( [id] => 6409626 [patent_doc_number] => 20020182887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Method and apparatus of forming a sputtered doped seed layer' [patent_app_type] => new [patent_app_number] => 10/198437 [patent_app_country] => US [patent_app_date] => 2002-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3570 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0182/20020182887.pdf [firstpage_image] =>[orig_patent_app_number] => 10198437 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/198437
Method and apparatus of forming a sputtered doped seed layer Jul 15, 2002 Abandoned
Array ( [id] => 6385745 [patent_doc_number] => 20020180047 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Method of fabricating a semiconductor device' [patent_app_type] => new [patent_app_number] => 10/195063 [patent_app_country] => US [patent_app_date] => 2002-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5367 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0180/20020180047.pdf [firstpage_image] =>[orig_patent_app_number] => 10195063 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/195063
Method of fabricating a semiconductor device Jul 14, 2002 Abandoned
Array ( [id] => 6772460 [patent_doc_number] => 20030015798 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-01-23 [patent_title] => 'Semiconductor device and method of fabricating the semiconductor device' [patent_app_type] => new [patent_app_number] => 10/195136 [patent_app_country] => US [patent_app_date] => 2002-07-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5449 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20030015798.pdf [firstpage_image] =>[orig_patent_app_number] => 10195136 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/195136
Semiconductor device and method of fabricating the semiconductor device Jul 14, 2002 Abandoned
Array ( [id] => 6447701 [patent_doc_number] => 20020177328 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'Substrate for semiconductor device and method of manufacturing the same' [patent_app_type] => new [patent_app_number] => 10/190520 [patent_app_country] => US [patent_app_date] => 2002-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3796 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20020177328.pdf [firstpage_image] =>[orig_patent_app_number] => 10190520 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/190520
Method for epitaxially growing crystalline insulation layer on crystalline silicon substrate while simultaneously growing silicon oxide, nitride, or oxynitride Jul 8, 2002 Issued
90/006324 TUBULAR EXTRUSION GASKET PROFILE EXHIBITING A CONTROLLED DEFLECTION RESPONSE FOR IMPROVED ENVIRONMENTAL SEALING AND EMI SHIELDING Jul 8, 2002 Issued
Array ( [id] => 6529564 [patent_doc_number] => 20020192852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-19 [patent_title] => 'Micromechanical and microoptomechanical structures with backside metalization' [patent_app_type] => new [patent_app_number] => 10/192087 [patent_app_country] => US [patent_app_date] => 2002-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6529 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0192/20020192852.pdf [firstpage_image] =>[orig_patent_app_number] => 10192087 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/192087
Micromechanical and microoptomechanical structures with backside metalization Jul 8, 2002 Abandoned
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