Search

Charles E. Cooley

Examiner (ID: 18585, Phone: (571)272-1139 , Office: P/1774 )

Most Active Art Unit
1774
Art Unit(s)
1797, 1754, 3405, 2402, 1774, 1723
Total Applications
4068
Issued Applications
3145
Pending Applications
298
Abandoned Applications
660

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6986889 [patent_doc_number] => 20010036721 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-01 [patent_title] => 'Process for metallizing at least one insulating layer of a component' [patent_app_type] => new [patent_app_number] => 09/817966 [patent_app_country] => US [patent_app_date] => 2001-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4489 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0036/20010036721.pdf [firstpage_image] =>[orig_patent_app_number] => 09817966 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/817966
Process for metallizing at least one insulating layer of a component Mar 26, 2001 Abandoned
Array ( [id] => 7645670 [patent_doc_number] => 06472299 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-10-29 [patent_title] => 'Method and apparatus for treating a substrate with hydrogen radicals at a temperature of less than 40 K' [patent_app_type] => B2 [patent_app_number] => 09/811785 [patent_app_country] => US [patent_app_date] => 2001-03-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5961 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/472/06472299.pdf [firstpage_image] =>[orig_patent_app_number] => 09811785 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/811785
Method and apparatus for treating a substrate with hydrogen radicals at a temperature of less than 40 K Mar 19, 2001 Issued
Array ( [id] => 5844620 [patent_doc_number] => 20020132473 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-19 [patent_title] => 'Integrated barrier layer structure for copper contact level metallization' [patent_app_type] => new [patent_app_number] => 09/805865 [patent_app_country] => US [patent_app_date] => 2001-03-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4377 [patent_no_of_claims] => 73 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0132/20020132473.pdf [firstpage_image] =>[orig_patent_app_number] => 09805865 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/805865
Integrated barrier layer structure for copper contact level metallization Mar 12, 2001 Abandoned
Array ( [id] => 6921623 [patent_doc_number] => 20010029108 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-10-11 [patent_title] => 'Substrate processeing apparatus, substrate processing method and electronic device manufacturing method' [patent_app_type] => new [patent_app_number] => 09/799816 [patent_app_country] => US [patent_app_date] => 2001-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5610 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0029/20010029108.pdf [firstpage_image] =>[orig_patent_app_number] => 09799816 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/799816
Substrate processeing apparatus, substrate processing method and electronic device manufacturing method Mar 4, 2001 Abandoned
Array ( [id] => 6379041 [patent_doc_number] => 20020119644 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-29 [patent_title] => 'Method of controlling crystallographic orientation in laser-annealed polycrystalline silicon films' [patent_app_type] => new [patent_app_number] => 09/796345 [patent_app_country] => US [patent_app_date] => 2001-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2556 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0119/20020119644.pdf [firstpage_image] =>[orig_patent_app_number] => 09796345 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/796345
Method of controlling crystallographic orientation in laser-annealed polycrystalline silicon films Feb 27, 2001 Issued
Array ( [id] => 1474525 [patent_doc_number] => 06387762 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-05-14 [patent_title] => 'Method of manufacturing ferroelectric memory device' [patent_app_type] => B2 [patent_app_number] => 09/791616 [patent_app_country] => US [patent_app_date] => 2001-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4763 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/387/06387762.pdf [firstpage_image] =>[orig_patent_app_number] => 09791616 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/791616
Method of manufacturing ferroelectric memory device Feb 25, 2001 Issued
Array ( [id] => 5922065 [patent_doc_number] => 20020115283 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-08-22 [patent_title] => 'Planarization by selective electro-dissolution' [patent_app_type] => new [patent_app_number] => 09/785115 [patent_app_country] => US [patent_app_date] => 2001-02-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3723 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20020115283.pdf [firstpage_image] =>[orig_patent_app_number] => 09785115 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/785115
Planarization by selective electro-dissolution Feb 19, 2001 Abandoned
Array ( [id] => 6908187 [patent_doc_number] => 20010010954 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-08-02 [patent_title] => 'Method of forming an ESD protection device' [patent_app_type] => new [patent_app_number] => 09/782024 [patent_app_country] => US [patent_app_date] => 2001-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3966 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20010010954.pdf [firstpage_image] =>[orig_patent_app_number] => 09782024 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/782024
Method of forming an ESD protection device Feb 13, 2001 Abandoned
Array ( [id] => 5906929 [patent_doc_number] => 20020142589 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-03 [patent_title] => 'Method of obtaining low temperature alpha-ta thin films using wafer bias' [patent_app_type] => new [patent_app_number] => 09/775356 [patent_app_country] => US [patent_app_date] => 2001-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3682 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0142/20020142589.pdf [firstpage_image] =>[orig_patent_app_number] => 09775356 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/775356
Method of obtaining low temperature alpha-ta thin films using wafer bias Jan 30, 2001 Abandoned
Array ( [id] => 1547591 [patent_doc_number] => 06445070 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Coherent carbide diffusion barrier for integrated circuit interconnects' [patent_app_type] => B1 [patent_app_number] => 09/772715 [patent_app_country] => US [patent_app_date] => 2001-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3246 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/445/06445070.pdf [firstpage_image] =>[orig_patent_app_number] => 09772715 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/772715
Coherent carbide diffusion barrier for integrated circuit interconnects Jan 28, 2001 Issued
Array ( [id] => 1455556 [patent_doc_number] => 06462417 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-08 [patent_title] => 'Coherent alloy diffusion barrier for integrated circuit interconnects' [patent_app_type] => B1 [patent_app_number] => 09/772750 [patent_app_country] => US [patent_app_date] => 2001-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3235 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/462/06462417.pdf [firstpage_image] =>[orig_patent_app_number] => 09772750 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/772750
Coherent alloy diffusion barrier for integrated circuit interconnects Jan 28, 2001 Issued
Array ( [id] => 6884724 [patent_doc_number] => 20010038884 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-11-08 [patent_title] => 'Method for forming coating film on a plate-like workpiece' [patent_app_type] => new [patent_app_number] => 09/768195 [patent_app_country] => US [patent_app_date] => 2001-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3896 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0038/20010038884.pdf [firstpage_image] =>[orig_patent_app_number] => 09768195 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/768195
Method for forming coating film on a plate-like workpiece Jan 22, 2001 Abandoned
Array ( [id] => 1594630 [patent_doc_number] => 06383929 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Copper vias in low-k technology' [patent_app_type] => B1 [patent_app_number] => 09/759015 [patent_app_country] => US [patent_app_date] => 2001-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1787 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/383/06383929.pdf [firstpage_image] =>[orig_patent_app_number] => 09759015 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/759015
Copper vias in low-k technology Jan 10, 2001 Issued
Array ( [id] => 6081240 [patent_doc_number] => 20020081845 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-06-27 [patent_title] => 'Method for the formation of diffusion barrier' [patent_app_type] => new [patent_app_number] => 09/749706 [patent_app_country] => US [patent_app_date] => 2000-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3400 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0081/20020081845.pdf [firstpage_image] =>[orig_patent_app_number] => 09749706 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/749706
Method for the formation of diffusion barrier Dec 26, 2000 Abandoned
Array ( [id] => 7000653 [patent_doc_number] => 20010053602 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-12-20 [patent_title] => 'Method for manufacturing a copper interconnection in semiconductor memory device' [patent_app_type] => new [patent_app_number] => 09/740945 [patent_app_country] => US [patent_app_date] => 2000-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1587 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0053/20010053602.pdf [firstpage_image] =>[orig_patent_app_number] => 09740945 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/740945
Method for manufacturing a copper interconnection with an aluminum oxide-conductive layer stack barrier layer in semiconductor memory device Dec 20, 2000 Issued
Array ( [id] => 1559832 [patent_doc_number] => 06436808 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-20 [patent_title] => 'NH3/N2-plasma treatment to prevent organic ILD degradation' [patent_app_type] => B1 [patent_app_number] => 09/731007 [patent_app_country] => US [patent_app_date] => 2000-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3227 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/436/06436808.pdf [firstpage_image] =>[orig_patent_app_number] => 09731007 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/731007
NH3/N2-plasma treatment to prevent organic ILD degradation Dec 6, 2000 Issued
Array ( [id] => 1410343 [patent_doc_number] => 06528432 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-04 [patent_title] => 'H2-or H2/N2-plasma treatment to prevent organic ILD degradation' [patent_app_type] => B1 [patent_app_number] => 09/729455 [patent_app_country] => US [patent_app_date] => 2000-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3592 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/528/06528432.pdf [firstpage_image] =>[orig_patent_app_number] => 09729455 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/729455
H2-or H2/N2-plasma treatment to prevent organic ILD degradation Dec 4, 2000 Issued
Array ( [id] => 6875402 [patent_doc_number] => 20010000146 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-04-05 [patent_title] => 'METHOD FOR REDUCING BY-PRODUCT DEPOSITION IN WAFER PROCESSING EQUIPMENT.' [patent_app_type] => new-utility [patent_app_number] => 09/727547 [patent_app_country] => US [patent_app_date] => 2000-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2609 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0000/20010000146.pdf [firstpage_image] =>[orig_patent_app_number] => 09727547 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/727547
Method for reducing by-product deposition in wafer processing equipment Dec 3, 2000 Issued
Array ( [id] => 6877578 [patent_doc_number] => 20010003064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2001-06-07 [patent_title] => 'Method for fabricating semiconductor device and apparatus for fabricating same' [patent_app_type] => new-utility [patent_app_number] => 09/727675 [patent_app_country] => US [patent_app_date] => 2000-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1774 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20010003064.pdf [firstpage_image] =>[orig_patent_app_number] => 09727675 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/727675
Method for fabricating semiconductor device and apparatus for fabricating same Dec 3, 2000 Abandoned
Array ( [id] => 6593904 [patent_doc_number] => 20020063279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-05-30 [patent_title] => ' Tunnel oxide' [patent_app_type] => new [patent_app_number] => 09/726816 [patent_app_country] => US [patent_app_date] => 2000-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1995 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20020063279.pdf [firstpage_image] =>[orig_patent_app_number] => 09726816 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/726816
Tunnel oxide Nov 29, 2000 Abandoned
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