Search

Charles E. Cooley

Examiner (ID: 18585, Phone: (571)272-1139 , Office: P/1774 )

Most Active Art Unit
1774
Art Unit(s)
1797, 1754, 3405, 2402, 1774, 1723
Total Applications
4068
Issued Applications
3145
Pending Applications
298
Abandoned Applications
660

Applications

Application numberTitle of the applicationFiling DateStatus
09/115856 HIGH CHARGE STORAGE DENSITY INTEGRATED CIRCUIT CAPACITOR Jul 14, 1998 Abandoned
Array ( [id] => 4329743 [patent_doc_number] => 06313046 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-11-06 [patent_title] => 'Method of forming materials between conductive electrical components, and insulating materials' [patent_app_type] => 1 [patent_app_number] => 9/115339 [patent_app_country] => US [patent_app_date] => 1998-07-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 14 [patent_no_of_words] => 4435 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/313/06313046.pdf [firstpage_image] =>[orig_patent_app_number] => 115339 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/115339
Method of forming materials between conductive electrical components, and insulating materials Jul 13, 1998 Issued
Array ( [id] => 4356602 [patent_doc_number] => 06190931 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-20 [patent_title] => 'Method of manufacture of a linear spring electromagnetic grill ink jet printer' [patent_app_type] => 1 [patent_app_number] => 9/113126 [patent_app_country] => US [patent_app_date] => 1998-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 27 [patent_no_of_words] => 4482 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/190/06190931.pdf [firstpage_image] =>[orig_patent_app_number] => 113126 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/113126
Method of manufacture of a linear spring electromagnetic grill ink jet printer Jul 9, 1998 Issued
Array ( [id] => 1585337 [patent_doc_number] => 06358771 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Low oxygen assembly of glass sealed packages' [patent_app_type] => B1 [patent_app_number] => 09/109434 [patent_app_country] => US [patent_app_date] => 1998-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1827 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/358/06358771.pdf [firstpage_image] =>[orig_patent_app_number] => 09109434 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/109434
Low oxygen assembly of glass sealed packages Jul 1, 1998 Issued
Array ( [id] => 4292703 [patent_doc_number] => 06180510 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-30 [patent_title] => 'Method of manufacturing a substantially flat surface of a semiconductor device through a polishing operation' [patent_app_type] => 1 [patent_app_number] => 9/104392 [patent_app_country] => US [patent_app_date] => 1998-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 32 [patent_no_of_words] => 5506 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/180/06180510.pdf [firstpage_image] =>[orig_patent_app_number] => 104392 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/104392
Method of manufacturing a substantially flat surface of a semiconductor device through a polishing operation Jun 24, 1998 Issued
Array ( [id] => 4190993 [patent_doc_number] => 06130110 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-10 [patent_title] => 'Film carrier tape, tape carrier semiconductor device assembly, semiconductor device, and method of making the same, mounted board, and electronic device' [patent_app_type] => 1 [patent_app_number] => 9/091126 [patent_app_country] => US [patent_app_date] => 1998-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 24 [patent_no_of_words] => 7915 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/130/06130110.pdf [firstpage_image] =>[orig_patent_app_number] => 091126 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/091126
Film carrier tape, tape carrier semiconductor device assembly, semiconductor device, and method of making the same, mounted board, and electronic device Jun 15, 1998 Issued
09/098556 METHOD FOR FORMING A THIN OXIDE LAYER USING WET OXIDATION Jun 15, 1998 Abandoned
Array ( [id] => 4125496 [patent_doc_number] => 06127268 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Process for fabricating a semiconductor device with a patterned metal layer' [patent_app_type] => 1 [patent_app_number] => 9/095986 [patent_app_country] => US [patent_app_date] => 1998-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 2220 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/127/06127268.pdf [firstpage_image] =>[orig_patent_app_number] => 095986 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/095986
Process for fabricating a semiconductor device with a patterned metal layer Jun 10, 1998 Issued
Array ( [id] => 4293680 [patent_doc_number] => 06184066 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-06 [patent_title] => 'Method for fabricating semiconductor device' [patent_app_type] => 1 [patent_app_number] => 9/085545 [patent_app_country] => US [patent_app_date] => 1998-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 87 [patent_no_of_words] => 10066 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 202 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/184/06184066.pdf [firstpage_image] =>[orig_patent_app_number] => 085545 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/085545
Method for fabricating semiconductor device May 26, 1998 Issued
Array ( [id] => 4348710 [patent_doc_number] => 06214735 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-10 [patent_title] => 'Method for planarizing a semiconductor substrate' [patent_app_type] => 1 [patent_app_number] => 9/080874 [patent_app_country] => US [patent_app_date] => 1998-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2051 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/214/06214735.pdf [firstpage_image] =>[orig_patent_app_number] => 080874 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/080874
Method for planarizing a semiconductor substrate May 17, 1998 Issued
Array ( [id] => 4405414 [patent_doc_number] => 06232182 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-05-15 [patent_title] => 'Non-volatile semiconductor memory device including memory transistor with a composite gate structure and method of manufacturing the same' [patent_app_type] => 1 [patent_app_number] => 9/070754 [patent_app_country] => US [patent_app_date] => 1998-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 6105 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/232/06232182.pdf [firstpage_image] =>[orig_patent_app_number] => 070754 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/070754
Non-volatile semiconductor memory device including memory transistor with a composite gate structure and method of manufacturing the same Apr 30, 1998 Issued
Array ( [id] => 4417459 [patent_doc_number] => 06194305 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-02-27 [patent_title] => 'Planarization using plasma oxidized amorphous silicon' [patent_app_type] => 1 [patent_app_number] => 9/059899 [patent_app_country] => US [patent_app_date] => 1998-04-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 8 [patent_no_of_words] => 2650 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/194/06194305.pdf [firstpage_image] =>[orig_patent_app_number] => 059899 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/059899
Planarization using plasma oxidized amorphous silicon Apr 13, 1998 Issued
Array ( [id] => 4125767 [patent_doc_number] => 06127285 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-10-03 [patent_title] => 'Interlevel dielectrics with reduced dielectric constant' [patent_app_type] => 1 [patent_app_number] => 9/023915 [patent_app_country] => US [patent_app_date] => 1998-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 2045 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/127/06127285.pdf [firstpage_image] =>[orig_patent_app_number] => 023915 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/023915
Interlevel dielectrics with reduced dielectric constant Feb 12, 1998 Issued
Array ( [id] => 4356906 [patent_doc_number] => 06174765 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-01-16 [patent_title] => 'Method of reducing leakage current in dielectric' [patent_app_type] => 1 [patent_app_number] => 9/010005 [patent_app_country] => US [patent_app_date] => 1998-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1619 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/174/06174765.pdf [firstpage_image] =>[orig_patent_app_number] => 010005 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/010005
Method of reducing leakage current in dielectric Jan 20, 1998 Issued
Array ( [id] => 4084271 [patent_doc_number] => 06162712 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Platinum source compositions for chemical vapor deposition of platinum' [patent_app_type] => 1 [patent_app_number] => 9/008705 [patent_app_country] => US [patent_app_date] => 1998-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 4502 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/162/06162712.pdf [firstpage_image] =>[orig_patent_app_number] => 008705 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/008705
Platinum source compositions for chemical vapor deposition of platinum Jan 15, 1998 Issued
Array ( [id] => 4219172 [patent_doc_number] => 06040238 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-03-21 [patent_title] => 'Thermal annealing for preventing polycide void' [patent_app_type] => 1 [patent_app_number] => 9/004190 [patent_app_country] => US [patent_app_date] => 1998-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1942 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 169 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/040/06040238.pdf [firstpage_image] =>[orig_patent_app_number] => 004190 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/004190
Thermal annealing for preventing polycide void Jan 7, 1998 Issued
Array ( [id] => 4258979 [patent_doc_number] => 06258675 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'High K gate electrode' [patent_app_type] => 1 [patent_app_number] => 8/993766 [patent_app_country] => US [patent_app_date] => 1997-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 2616 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/258/06258675.pdf [firstpage_image] =>[orig_patent_app_number] => 993766 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/993766
High K gate electrode Dec 17, 1997 Issued
Array ( [id] => 4354427 [patent_doc_number] => 06218292 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-17 [patent_title] => 'Dual layer bottom anti-reflective coating' [patent_app_type] => 1 [patent_app_number] => 8/993126 [patent_app_country] => US [patent_app_date] => 1997-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3327 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/218/06218292.pdf [firstpage_image] =>[orig_patent_app_number] => 993126 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/993126
Dual layer bottom anti-reflective coating Dec 17, 1997 Issued
Array ( [id] => 4275408 [patent_doc_number] => 06281078 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-08-28 [patent_title] => 'Manufacturing process to eliminate ONO fence material in high density NAND-type flash memory devices' [patent_app_type] => 1 [patent_app_number] => 8/993344 [patent_app_country] => US [patent_app_date] => 1997-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 3416 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/281/06281078.pdf [firstpage_image] =>[orig_patent_app_number] => 993344 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/993344
Manufacturing process to eliminate ONO fence material in high density NAND-type flash memory devices Dec 17, 1997 Issued
Array ( [id] => 4116497 [patent_doc_number] => 06071765 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-06 [patent_title] => 'Method of forming polycrystalline silicon layer on substrate and surface treatment apparatus thereof' [patent_app_type] => 1 [patent_app_number] => 8/915269 [patent_app_country] => US [patent_app_date] => 1997-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 51 [patent_no_of_words] => 16634 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/071/06071765.pdf [firstpage_image] =>[orig_patent_app_number] => 915269 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/915269
Method of forming polycrystalline silicon layer on substrate and surface treatment apparatus thereof Aug 19, 1997 Issued
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