Charles E. Cooley

Array ( [id] => 18068237 [patent_doc_number] => 20220399325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-15 [patent_title] => LTHC AS CHARGING BARRIER IN INFO PACKAGE FORMATION [patent_app_type] => utility [patent_app_number] => 17/874492 [patent_app_country] => US [patent_app_date] => 2022-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7217 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17874492 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17933260 [patent_doc_number] => 20220328386 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => Method of Making an Integrated Circuit Package Including an Integrated Circuit Die Soldered to a Bond Pad of a Redistribution Structure [patent_app_type] => utility [patent_app_number] => 17/852766 [patent_app_country] => US [patent_app_date] => 2022-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9645 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852766 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17933645 [patent_doc_number] => 20220328771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-13 [patent_title] => PHOTOELECTRIC CONVERSION ELEMENT AND SOLID-STATE IMAGING DEVICE [patent_app_type] => utility [patent_app_number] => 17/848161 [patent_app_country] => US [patent_app_date] => 2022-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26987 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848161 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18320277 [patent_doc_number] => 20230118405 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-20 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD FOR FORMING SAME [patent_app_type] => utility [patent_app_number] => 17/845092 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7443 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17845092 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17917458 [patent_doc_number] => 20220319854 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => SELECTIVE DEPOSITION USING HYDROLYSIS [patent_app_type] => utility [patent_app_number] => 17/808046 [patent_app_country] => US [patent_app_date] => 2022-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9703 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17808046 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18081144 [patent_doc_number] => 20220406756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/840164 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10867 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840164 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18679794 [patent_doc_number] => 20230317451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-05 [patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/840480 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840480 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18661413 [patent_doc_number] => 20230307427 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => Packages Including Interconnect Die Embedded in Package Substrates [patent_app_type] => utility [patent_app_number] => 17/806329 [patent_app_country] => US [patent_app_date] => 2022-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6815 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17806329 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18822982 [patent_doc_number] => 20230397323 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-07 [patent_title] => PACKAGE BOTTOM SIDE THERMAL SOLUTION WITH DISCRETE HAT-SHAPED COPPER SPREADER COMPONENT [patent_app_type] => utility [patent_app_number] => 17/834641 [patent_app_country] => US [patent_app_date] => 2022-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7137 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17834641 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19679273 [patent_doc_number] => 12191145 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-07 [patent_title] => Semiconductor device and formation method thereof [patent_app_type] => utility [patent_app_number] => 17/834596 [patent_app_country] => US [patent_app_date] => 2022-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 43 [patent_figures_cnt] => 45 [patent_no_of_words] => 6971 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17834596 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18608276 [patent_doc_number] => 11749755 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-09-05 [patent_title] => Method of forming FinFET with low-dielectric-constant gate electrode spacers [patent_app_type] => utility [patent_app_number] => 17/831077 [patent_app_country] => US [patent_app_date] => 2022-06-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 26 [patent_no_of_words] => 6686 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17831077 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18848770 [patent_doc_number] => 20230411174 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => Package Assembly and Method of Attaching Multi-Height Dies/Modules to Multi-Chip Active/Passive Substrate [patent_app_type] => utility [patent_app_number] => 17/829252 [patent_app_country] => US [patent_app_date] => 2022-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16207 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17829252 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18009069 [patent_doc_number] => 20220367836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-17 [patent_title] => FLEXIBLE ELECTRONIC DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 17/826722 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10068 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17826722 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17855265 [patent_doc_number] => 20220285308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-08 [patent_title] => RADAR DEVICE [patent_app_type] => utility [patent_app_number] => 17/826418 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9375 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17826418 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 17871003 [patent_doc_number] => 20220293740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-15 [patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SYSTEM INCLUDING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/826435 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9538 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 34 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17826435 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18849049 [patent_doc_number] => 20230411453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE AND METHODS OF FORMATION [patent_app_type] => utility [patent_app_number] => 17/804427 [patent_app_country] => US [patent_app_date] => 2022-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15168 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17804427 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18812577 [patent_doc_number] => 20230386914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => METHODS OF FORMING SEMICONDUCTOR DEVICE STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/825307 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10132 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17825307 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19223660 [patent_doc_number] => 20240188364 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-06 [patent_title] => DISPLAY PANEL [patent_app_type] => utility [patent_app_number] => 17/781109 [patent_app_country] => US [patent_app_date] => 2022-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9455 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17781109 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18024326 [patent_doc_number] => 20220375825 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR STRUCTURE WITH POWER CONNECTING STRUCTURES UNDER TRANSISTORS AND SEMICONDUCTOR STRUCTURE WITH POWER CONNECTING STRUCTURES UNDER TRANSISTORS [patent_app_type] => utility [patent_app_number] => 17/746997 [patent_app_country] => US [patent_app_date] => 2022-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5610 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 211 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17746997 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 18335608 [patent_doc_number] => 20230127556 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-27 [patent_title] => MANUFACTURING AND REUSE OF SEMICONDUCTOR SUBSTRATES [patent_app_type] => utility [patent_app_number] => 17/743006 [patent_app_country] => US [patent_app_date] => 2022-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13576 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -29 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17743006 [rel_patent_id] =>[rel_patent_doc_number] =>)