Search

Charles E. Phillips

Examiner (ID: 298)

Most Active Art Unit
3751
Art Unit(s)
3751, 3105, 2403
Total Applications
2438
Issued Applications
1788
Pending Applications
61
Abandoned Applications
589

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20682794 [patent_doc_number] => 20260121623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-30 [patent_title] => LATCH CIRCUIT, DYNAMIC LATCH, DYNAMIC D FLIP-FLOP, AND RELATED APPARATUSES [patent_app_type] => utility [patent_app_number] => 19/151942 [patent_app_country] => US [patent_app_date] => 2025-04-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8228 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19151942 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/151942
LATCH CIRCUIT, DYNAMIC LATCH, DYNAMIC D FLIP-FLOP, AND RELATED APPARATUSES Apr 10, 2025 Pending
Array ( [id] => 20620172 [patent_doc_number] => 20260090286 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-26 [patent_title] => QUANTUM DEVICE AND METHOD WITH TUNABLE RESONANT FREQUENCY [patent_app_type] => utility [patent_app_number] => 19/056676 [patent_app_country] => US [patent_app_date] => 2025-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4512 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19056676 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/056676
QUANTUM DEVICE AND METHOD WITH TUNABLE RESONANT FREQUENCY Feb 17, 2025 Pending
Array ( [id] => 20054555 [patent_doc_number] => 20250192777 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-12 [patent_title] => SIGNAL TRANSMISSION DEVICE, ELECTRONIC APPLIANCE, AND VEHICLE [patent_app_type] => utility [patent_app_number] => 19/054685 [patent_app_country] => US [patent_app_date] => 2025-02-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19054685 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/054685
SIGNAL TRANSMISSION DEVICE, ELECTRONIC APPLIANCE, AND VEHICLE Feb 13, 2025 Pending
Array ( [id] => 20197410 [patent_doc_number] => 20250274120 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-08-28 [patent_title] => SOLID STATE SWITCH AND A CIRCUIT [patent_app_type] => utility [patent_app_number] => 19/052039 [patent_app_country] => US [patent_app_date] => 2025-02-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19052039 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/052039
SOLID STATE SWITCH AND A CIRCUIT Feb 11, 2025 Pending
Array ( [id] => 20660970 [patent_doc_number] => 20260113023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-23 [patent_title] => Device and Method of Sampling an Input Signal Employed Thereby [patent_app_type] => utility [patent_app_number] => 19/049041 [patent_app_country] => US [patent_app_date] => 2025-02-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1023 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19049041 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/049041
Device and Method of Sampling an Input Signal Employed Thereby Feb 9, 2025 Pending
Array ( [id] => 20234054 [patent_doc_number] => 20250291373 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-18 [patent_title] => WIDE-BANDWIDTH POWER MANAGEMENT INTEGRATED CIRCUIT [patent_app_type] => utility [patent_app_number] => 19/044718 [patent_app_country] => US [patent_app_date] => 2025-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 107 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19044718 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/044718
WIDE-BANDWIDTH POWER MANAGEMENT INTEGRATED CIRCUIT Feb 3, 2025 Pending
Array ( [id] => 20125038 [patent_doc_number] => 20250240069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-24 [patent_title] => TIME-INTERLEAVED TRANSCEIVER ARCHITECTURE [patent_app_type] => utility [patent_app_number] => 19/027248 [patent_app_country] => US [patent_app_date] => 2025-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19027248 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/027248
TIME-INTERLEAVED TRANSCEIVER ARCHITECTURE Jan 16, 2025 Pending
Array ( [id] => 20298405 [patent_doc_number] => 20250323648 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => GAIN CALIBRATION OF DIGITAL-TO-TIME CONVERTER (DTC) USED IN FRACTIONAL FREQUENCY DIVIDERS [patent_app_type] => utility [patent_app_number] => 19/023493 [patent_app_country] => US [patent_app_date] => 2025-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4413 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 329 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19023493 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/023493
GAIN CALIBRATION OF DIGITAL-TO-TIME CONVERTER (DTC) USED IN FRACTIONAL FREQUENCY DIVIDERS Jan 15, 2025 Pending
Array ( [id] => 20139955 [patent_doc_number] => 20250246999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-31 [patent_title] => INTEGRATED CIRCUIT AND METHOD [patent_app_type] => utility [patent_app_number] => 19/022849 [patent_app_country] => US [patent_app_date] => 2025-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19022849 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/022849
INTEGRATED CIRCUIT AND METHOD Jan 14, 2025 Pending
Array ( [id] => 20103581 [patent_doc_number] => 20250233517 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => CHARGE PUMP NOISE CANCELLING TECHNIQUE WITH TAIL CURRENT SOURCE CHOPPING [patent_app_type] => utility [patent_app_number] => 19/022725 [patent_app_country] => US [patent_app_date] => 2025-01-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1101 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19022725 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/022725
CHARGE PUMP NOISE CANCELLING TECHNIQUE WITH TAIL CURRENT SOURCE CHOPPING Jan 14, 2025 Pending
Array ( [id] => 20791658 [patent_doc_number] => 12665580 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-23 [patent_title] => Clock detection method, clock detection circuit, and image sensor [patent_app_type] => utility [patent_app_number] => 19/012920 [patent_app_country] => US [patent_app_date] => 2025-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 1873 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 270 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19012920 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/012920
Clock detection method, clock detection circuit, and image sensor Jan 7, 2025 Issued
Array ( [id] => 20101895 [patent_doc_number] => 20250231831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-17 [patent_title] => DETERIORATION CORRECTION CIRCUITRY [patent_app_type] => utility [patent_app_number] => 19/013680 [patent_app_country] => US [patent_app_date] => 2025-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5637 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19013680 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/013680
DETERIORATION CORRECTION CIRCUITRY Jan 7, 2025 Pending
Array ( [id] => 20096807 [patent_doc_number] => 20250226743 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => REDUNDANT ON-CHIP HIGH VOLTAGE GENERATION [patent_app_type] => utility [patent_app_number] => 19/011007 [patent_app_country] => US [patent_app_date] => 2025-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1243 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19011007 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/011007
REDUNDANT ON-CHIP HIGH VOLTAGE GENERATION Jan 5, 2025 Pending
Array ( [id] => 20766576 [patent_doc_number] => 20260163566 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-06-11 [patent_title] => SWITCH DEVICE AND CONTROL METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 19/007564 [patent_app_country] => US [patent_app_date] => 2025-01-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 980 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19007564 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/007564
SWITCH DEVICE AND CONTROL METHOD THEREOF Jan 1, 2025 Pending
Array ( [id] => 20351244 [patent_doc_number] => 20250348096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-11-13 [patent_title] => INTEGRATED CIRCUIT FOR CONVERTING VOLTAGE AND POWER MANAGEMENT INTEGRATED CIRCUIT INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 19/004594 [patent_app_country] => US [patent_app_date] => 2024-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19004594 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/004594
INTEGRATED CIRCUIT FOR CONVERTING VOLTAGE AND POWER MANAGEMENT INTEGRATED CIRCUIT INCLUDING THE SAME Dec 29, 2024 Pending
Array ( [id] => 20089693 [patent_doc_number] => 20250219629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => INTER-LANE SKEW COMPENSATION METHOD [patent_app_type] => utility [patent_app_number] => 19/002746 [patent_app_country] => US [patent_app_date] => 2024-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19002746 [rel_patent_id] =>[rel_patent_doc_number] =>)
19/002746
INTER-LANE SKEW COMPENSATION METHOD Dec 26, 2024 Pending
Array ( [id] => 19893809 [patent_doc_number] => 20250119121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-04-10 [patent_title] => IMPEDANCE CALIBRATION CIRCUIT AND METHOD [patent_app_type] => utility [patent_app_number] => 18/985370 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13053 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985370 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/985370
IMPEDANCE CALIBRATION CIRCUIT AND METHOD Dec 17, 2024 Pending
Array ( [id] => 20064246 [patent_doc_number] => 20250202468 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-19 [patent_title] => Systems and Devices of a Pulse Generator [patent_app_type] => utility [patent_app_number] => 18/985258 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5672 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985258 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/985258
Systems and Devices of a Pulse Generator Dec 17, 2024 Pending
Array ( [id] => 20089687 [patent_doc_number] => 20250219623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-03 [patent_title] => Sampling device and clock adjustment circuit thereof [patent_app_type] => utility [patent_app_number] => 18/985118 [patent_app_country] => US [patent_app_date] => 2024-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18985118 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/985118
Sampling device and clock adjustment circuit thereof Dec 17, 2024 Pending
Array ( [id] => 20298399 [patent_doc_number] => 20250323642 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-16 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/973310 [patent_app_country] => US [patent_app_date] => 2024-12-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4807 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18973310 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/973310
SEMICONDUCTOR DEVICE Dec 8, 2024 Pending
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