
Charles E. Phillips
Examiner (ID: 69)
| Most Active Art Unit | 3751 |
| Art Unit(s) | 2403, 3105, 3751 |
| Total Applications | 2438 |
| Issued Applications | 1788 |
| Pending Applications | 61 |
| Abandoned Applications | 589 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18721610
[patent_doc_number] => 11798967
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-24
[patent_title] => Image sensor package with transparent adhesive covering the optical sensing circuit
[patent_app_type] => utility
[patent_app_number] => 17/495047
[patent_app_country] => US
[patent_app_date] => 2021-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 1
[patent_figures_cnt] => 3
[patent_no_of_words] => 2112
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17495047
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/495047 | Image sensor package with transparent adhesive covering the optical sensing circuit | Oct 5, 2021 | Issued |
Array
(
[id] => 19444516
[patent_doc_number] => 12094806
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-17
[patent_title] => Blocking element for connecting pins of semiconductor dice
[patent_app_type] => utility
[patent_app_number] => 17/491082
[patent_app_country] => US
[patent_app_date] => 2021-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 13
[patent_no_of_words] => 3822
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17491082
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/491082 | Blocking element for connecting pins of semiconductor dice | Sep 29, 2021 | Issued |
Array
(
[id] => 18578980
[patent_doc_number] => 11735520
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-22
[patent_title] => Method for fabricating semiconductor device with programmable anti-fuse feature
[patent_app_type] => utility
[patent_app_number] => 17/490587
[patent_app_country] => US
[patent_app_date] => 2021-09-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 8907
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17490587
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/490587 | Method for fabricating semiconductor device with programmable anti-fuse feature | Sep 29, 2021 | Issued |
Array
(
[id] => 18943472
[patent_doc_number] => 20240038611
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-01
[patent_title] => Electrical Circuit Body, Power Converter, and Electrical Circuit Body Manufacturing Method
[patent_app_type] => utility
[patent_app_number] => 18/039896
[patent_app_country] => US
[patent_app_date] => 2021-09-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8455
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18039896
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/039896 | Electrical Circuit Body, Power Converter, and Electrical Circuit Body Manufacturing Method | Sep 28, 2021 | Pending |
Array
(
[id] => 18985431
[patent_doc_number] => 11910643
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-02-20
[patent_title] => Low cost micro OLED structure and method
[patent_app_type] => utility
[patent_app_number] => 17/484638
[patent_app_country] => US
[patent_app_date] => 2021-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 11
[patent_no_of_words] => 9310
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 197
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17484638
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/484638 | Low cost micro OLED structure and method | Sep 23, 2021 | Issued |
Array
(
[id] => 18264938
[patent_doc_number] => 20230086180
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-23
[patent_title] => DEFORMABLE SEMICONDUCTOR DEVICE CONNECTION
[patent_app_type] => utility
[patent_app_number] => 17/479854
[patent_app_country] => US
[patent_app_date] => 2021-09-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7356
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17479854
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/479854 | DEFORMABLE SEMICONDUCTOR DEVICE CONNECTION | Sep 19, 2021 | Pending |
Array
(
[id] => 18882995
[patent_doc_number] => 20240006364
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-04
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/248799
[patent_app_country] => US
[patent_app_date] => 2021-09-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8292
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18248799
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/248799 | SEMICONDUCTOR DEVICE | Sep 15, 2021 | Pending |
Array
(
[id] => 17477394
[patent_doc_number] => 20220084898
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-17
[patent_title] => METHOD OF MANUFACTURING ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/471577
[patent_app_country] => US
[patent_app_date] => 2021-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8948
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 250
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17471577
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/471577 | Method of manufacturing electronic devices with a cap and molding | Sep 9, 2021 | Issued |
Array
(
[id] => 18223964
[patent_doc_number] => 20230062958
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-02
[patent_title] => PACKAGE STRUCTURE AND METHOD FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/462850
[patent_app_country] => US
[patent_app_date] => 2021-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7235
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17462850
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/462850 | Semiconductor package structure having ring portion with recess for adhesive and method for forming the same | Aug 30, 2021 | Issued |
Array
(
[id] => 17886475
[patent_doc_number] => 20220301953
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-09-22
[patent_title] => RESISTANCE PATTERNS FOR AN ON-DIE EPM
[patent_app_type] => utility
[patent_app_number] => 17/462118
[patent_app_country] => US
[patent_app_date] => 2021-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8209
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17462118
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/462118 | Resistance patterns for an On-Die EPM | Aug 30, 2021 | Issued |
Array
(
[id] => 18097420
[patent_doc_number] => 20220415761
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-29
[patent_title] => LEAD-FRAME ASSEMBLY, SEMICONDUCTOR PACKAGE AND METHODS FOR IMPROVED ADHESION
[patent_app_type] => utility
[patent_app_number] => 17/458811
[patent_app_country] => US
[patent_app_date] => 2021-08-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4051
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17458811
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/458811 | Lead-frame assembly, semiconductor package and methods for improved adhesion | Aug 26, 2021 | Issued |
Array
(
[id] => 18653197
[patent_doc_number] => 20230299037
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-21
[patent_title] => Al WIRING MATERIAL
[patent_app_type] => utility
[patent_app_number] => 18/022978
[patent_app_country] => US
[patent_app_date] => 2021-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10881
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18022978
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/022978 | Al WIRING MATERIAL | Aug 23, 2021 | Pending |
Array
(
[id] => 18367745
[patent_doc_number] => 11647890
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-05-16
[patent_title] => Solid-state image pickup element, electronic equipment, and semiconductor apparatus
[patent_app_type] => utility
[patent_app_number] => 17/445232
[patent_app_country] => US
[patent_app_date] => 2021-08-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 11523
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17445232
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/445232 | Solid-state image pickup element, electronic equipment, and semiconductor apparatus | Aug 16, 2021 | Issued |
Array
(
[id] => 18983749
[patent_doc_number] => 11908939
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-20
[patent_title] => Method of making a FinFET device including a step of recessing a subset of the fins
[patent_app_type] => utility
[patent_app_number] => 17/403318
[patent_app_country] => US
[patent_app_date] => 2021-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3634
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17403318
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/403318 | Method of making a FinFET device including a step of recessing a subset of the fins | Aug 15, 2021 | Issued |
Array
(
[id] => 18999138
[patent_doc_number] => 11915994
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-02-27
[patent_title] => Package structure comprising a semiconductor die with a thermoelectric structure and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/401276
[patent_app_country] => US
[patent_app_date] => 2021-08-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 11261
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 150
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17401276
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/401276 | Package structure comprising a semiconductor die with a thermoelectric structure and manufacturing method thereof | Aug 11, 2021 | Issued |
Array
(
[id] => 17247064
[patent_doc_number] => 20210366809
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-25
[patent_title] => MANUFACTURING METHOD FOR REFLOWED SOLDER BALLS AND THEIR UNDER BUMP METALLURGY STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/398086
[patent_app_country] => US
[patent_app_date] => 2021-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2227
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -2
[patent_words_short_claim] => 34
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17398086
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/398086 | Manufacturing method for reflowed solder balls and their under bump metallurgy structure | Aug 9, 2021 | Issued |
Array
(
[id] => 19376575
[patent_doc_number] => 12068155
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-20
[patent_title] => Anisotropic sige:b epitaxial film growth for gate all around transistor
[patent_app_type] => utility
[patent_app_number] => 17/396371
[patent_app_country] => US
[patent_app_date] => 2021-08-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6144
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17396371
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/396371 | Anisotropic sige:b epitaxial film growth for gate all around transistor | Aug 5, 2021 | Issued |
Array
(
[id] => 18156157
[patent_doc_number] => 11569148
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-01-31
[patent_title] => Semiconductor device with a metal plate
[patent_app_type] => utility
[patent_app_number] => 17/391138
[patent_app_country] => US
[patent_app_date] => 2021-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 10
[patent_no_of_words] => 7032
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 179
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17391138
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/391138 | Semiconductor device with a metal plate | Aug 1, 2021 | Issued |
Array
(
[id] => 17217773
[patent_doc_number] => 20210351111
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-11
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/381169
[patent_app_country] => US
[patent_app_date] => 2021-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16665
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17381169
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/381169 | Manufacturing method for semiconductor device including through die hole | Jul 19, 2021 | Issued |
Array
(
[id] => 18874714
[patent_doc_number] => 11862537
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => Soldering structure with groove portion and power module comprising the same
[patent_app_type] => utility
[patent_app_number] => 17/374553
[patent_app_country] => US
[patent_app_date] => 2021-07-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 9
[patent_no_of_words] => 4509
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17374553
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/374553 | Soldering structure with groove portion and power module comprising the same | Jul 12, 2021 | Issued |