Search

Charles E. Phillips

Examiner (ID: 298)

Most Active Art Unit
3751
Art Unit(s)
3751, 3105, 2403
Total Applications
2438
Issued Applications
1788
Pending Applications
61
Abandoned Applications
589

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 17166742 [patent_doc_number] => 11152856 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-10-19 [patent_title] => Device for limiting a power loss during the sampling of a digital signal [patent_app_type] => utility [patent_app_number] => 16/738734 [patent_app_country] => US [patent_app_date] => 2020-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1791 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16738734 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/738734
Device for limiting a power loss during the sampling of a digital signal Jan 8, 2020 Issued
Array ( [id] => 16464984 [patent_doc_number] => 10848352 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-11-24 [patent_title] => Time based feed forward equalization (TFFE) for high-speed DDR transmitter [patent_app_type] => utility [patent_app_number] => 16/726759 [patent_app_country] => US [patent_app_date] => 2019-12-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 5593 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16726759 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/726759
Time based feed forward equalization (TFFE) for high-speed DDR transmitter Dec 23, 2019 Issued
Array ( [id] => 16684892 [patent_doc_number] => 10944388 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-09 [patent_title] => Asynchronous clock gating cells and related methods to provide a gated clock output [patent_app_type] => utility [patent_app_number] => 16/710365 [patent_app_country] => US [patent_app_date] => 2019-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 11574 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710365 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/710365
Asynchronous clock gating cells and related methods to provide a gated clock output Dec 10, 2019 Issued
Array ( [id] => 16684899 [patent_doc_number] => 10944395 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Driving apparatus and switching apparatus [patent_app_type] => utility [patent_app_number] => 16/705223 [patent_app_country] => US [patent_app_date] => 2019-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5838 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16705223 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/705223
Driving apparatus and switching apparatus Dec 5, 2019 Issued
Array ( [id] => 17523600 [patent_doc_number] => 20220109449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-04-07 [patent_title] => TRANSMISSION APPARATUS AND TRANSMISSION SYSTEM [patent_app_type] => utility [patent_app_number] => 17/311646 [patent_app_country] => US [patent_app_date] => 2019-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19203 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 398 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17311646 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/311646
Transmission apparatus and transmission system Dec 3, 2019 Issued
Array ( [id] => 16324790 [patent_doc_number] => 10784770 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-09-22 [patent_title] => Conversion circuit [patent_app_type] => utility [patent_app_number] => 16/683283 [patent_app_country] => US [patent_app_date] => 2019-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5283 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16683283 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/683283
Conversion circuit Nov 13, 2019 Issued
Array ( [id] => 15626973 [patent_doc_number] => 20200083891 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => PHASE-LOCKED LOOP AND DELAY-LOCKED LOOP [patent_app_type] => utility [patent_app_number] => 16/682290 [patent_app_country] => US [patent_app_date] => 2019-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6891 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16682290 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/682290
Phase-locked loop and delay-locked loop Nov 12, 2019 Issued
Array ( [id] => 17693289 [patent_doc_number] => 20220200582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => DC PULSE POWER SUPPLY DEVICE AND DUTY CONTROL METHOD FOR DC PULSE POWER SUPPLY DEVICE [patent_app_type] => utility [patent_app_number] => 17/602049 [patent_app_country] => US [patent_app_date] => 2019-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15039 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17602049 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/602049
DC pulse power supply device and duty control method for DC pulse power supply device Nov 7, 2019 Issued
Array ( [id] => 16178719 [patent_doc_number] => 20200225687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => METHOD OF FORMING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/601957 [patent_app_country] => US [patent_app_date] => 2019-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7216 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16601957 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/601957
Method of forming a semiconductor device Oct 14, 2019 Issued
Array ( [id] => 16700596 [patent_doc_number] => 10951216 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2021-03-16 [patent_title] => Synchronization of clock signals generated using output dividers [patent_app_type] => utility [patent_app_number] => 16/600793 [patent_app_country] => US [patent_app_date] => 2019-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4006 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16600793 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/600793
Synchronization of clock signals generated using output dividers Oct 13, 2019 Issued
Array ( [id] => 15939289 [patent_doc_number] => 20200161278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-21 [patent_title] => CONTROL SYSTEM, SEMICONDUCTOR DEVICE AND METHOD OF THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 16/598806 [patent_app_country] => US [patent_app_date] => 2019-10-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8667 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 48 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16598806 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/598806
Control system, semiconductor device and method of the semiconductor device Oct 9, 2019 Issued
Array ( [id] => 16301804 [patent_doc_number] => 20200287527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-09-10 [patent_title] => SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 16/597610 [patent_app_country] => US [patent_app_date] => 2019-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10688 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16597610 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/597610
Semiconductor devices Oct 8, 2019 Issued
Array ( [id] => 16774183 [patent_doc_number] => 10985307 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-04-20 [patent_title] => Cryogenic transmitter [patent_app_type] => utility [patent_app_number] => 16/597542 [patent_app_country] => US [patent_app_date] => 2019-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6516 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16597542 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/597542
Cryogenic transmitter Oct 8, 2019 Issued
Array ( [id] => 16522099 [patent_doc_number] => 10873326 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-22 [patent_title] => Input voltage sensing using zero crossing detection [patent_app_type] => utility [patent_app_number] => 16/594658 [patent_app_country] => US [patent_app_date] => 2019-10-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4309 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 218 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16594658 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/594658
Input voltage sensing using zero crossing detection Oct 6, 2019 Issued
Array ( [id] => 16536286 [patent_doc_number] => 10878899 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-29 [patent_title] => Low voltage, low power sensing based on level shifting sensing circuit [patent_app_type] => utility [patent_app_number] => 16/586651 [patent_app_country] => US [patent_app_date] => 2019-09-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 12 [patent_no_of_words] => 14234 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16586651 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/586651
Low voltage, low power sensing based on level shifting sensing circuit Sep 26, 2019 Issued
Array ( [id] => 16324814 [patent_doc_number] => 10784795 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-09-22 [patent_title] => Conversion circuit [patent_app_type] => utility [patent_app_number] => 16/547561 [patent_app_country] => US [patent_app_date] => 2019-08-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5020 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16547561 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/547561
Conversion circuit Aug 20, 2019 Issued
Array ( [id] => 16433790 [patent_doc_number] => 10833894 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-11-10 [patent_title] => Hybrid-mode laser drive circuit and optical emitting system [patent_app_type] => utility [patent_app_number] => 16/544920 [patent_app_country] => US [patent_app_date] => 2019-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 4590 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 232 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16544920 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/544920
Hybrid-mode laser drive circuit and optical emitting system Aug 19, 2019 Issued
Array ( [id] => 16477386 [patent_doc_number] => 10852327 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-12-01 [patent_title] => Digitally self-calibrated zero-voltage switching (ZVS) detection system [patent_app_type] => utility [patent_app_number] => 16/544491 [patent_app_country] => US [patent_app_date] => 2019-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 2425 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16544491 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/544491
Digitally self-calibrated zero-voltage switching (ZVS) detection system Aug 18, 2019 Issued
Array ( [id] => 16133791 [patent_doc_number] => 10700674 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2020-06-30 [patent_title] => Differential comparator circuit [patent_app_type] => utility [patent_app_number] => 16/542275 [patent_app_country] => US [patent_app_date] => 2019-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 2727 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16542275 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/542275
Differential comparator circuit Aug 14, 2019 Issued
Array ( [id] => 16480320 [patent_doc_number] => 10855281 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-12-01 [patent_title] => Wide supply range digital level shifter cell [patent_app_type] => utility [patent_app_number] => 16/541546 [patent_app_country] => US [patent_app_date] => 2019-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4418 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16541546 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/541546
Wide supply range digital level shifter cell Aug 14, 2019 Issued
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