
Charles E. Phillips
Examiner (ID: 298)
| Most Active Art Unit | 3751 |
| Art Unit(s) | 3751, 3105, 2403 |
| Total Applications | 2438 |
| Issued Applications | 1788 |
| Pending Applications | 61 |
| Abandoned Applications | 589 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 11666664
[patent_doc_number] => 20170155383
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-06-01
[patent_title] => 'POWER AMPLIFIER SATURATION DETECTION'
[patent_app_type] => utility
[patent_app_number] => 15/346023
[patent_app_country] => US
[patent_app_date] => 2016-11-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4994
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15346023
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/346023 | Power amplifier saturation detection | Nov 7, 2016 | Issued |
Array
(
[id] => 13893137
[patent_doc_number] => 10199120
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-02-05
[patent_title] => Shift register and driving method thereof, driving circuit, array substrate and display device
[patent_app_type] => utility
[patent_app_number] => 15/526380
[patent_app_country] => US
[patent_app_date] => 2016-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6233
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 269
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15526380
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/526380 | Shift register and driving method thereof, driving circuit, array substrate and display device | Oct 10, 2016 | Issued |
Array
(
[id] => 13294263
[patent_doc_number] => 10158335
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-12-18
[patent_title] => Gated CDS integrator
[patent_app_type] => utility
[patent_app_number] => 15/277223
[patent_app_country] => US
[patent_app_date] => 2016-09-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5069
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15277223
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/277223 | Gated CDS integrator | Sep 26, 2016 | Issued |
Array
(
[id] => 12241030
[patent_doc_number] => 20180073893
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-03-15
[patent_title] => 'TECHNIQUES FOR COUNTING RESOURCE USAGE'
[patent_app_type] => utility
[patent_app_number] => 15/263683
[patent_app_country] => US
[patent_app_date] => 2016-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5295
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15263683
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/263683 | Techniques for counting resource usage | Sep 12, 2016 | Issued |
Array
(
[id] => 11340089
[patent_doc_number] => 20160365845
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2016-12-15
[patent_title] => 'SEMICONDUCTOR CIRCUIT AND METHOD OF OPERATING THE CIRCUIT'
[patent_app_type] => utility
[patent_app_number] => 15/247430
[patent_app_country] => US
[patent_app_date] => 2016-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 38
[patent_figures_cnt] => 38
[patent_no_of_words] => 14325
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15247430
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/247430 | Semiconductor circuit and method of operating the circuit | Aug 24, 2016 | Issued |
Array
(
[id] => 13132235
[patent_doc_number] => 10084057
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-09-25
[patent_title] => NVM device in SOI technology and method of fabricating an according device
[patent_app_type] => utility
[patent_app_number] => 15/237794
[patent_app_country] => US
[patent_app_date] => 2016-08-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 27
[patent_no_of_words] => 13033
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15237794
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/237794 | NVM device in SOI technology and method of fabricating an according device | Aug 15, 2016 | Issued |
Array
(
[id] => 12188598
[patent_doc_number] => 20180047534
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-02-15
[patent_title] => 'Method for Detecting a Latent Failure Mode in an Electronic Selector Having an Interface Switch and at Least Two Underlying Switches'
[patent_app_type] => utility
[patent_app_number] => 15/236627
[patent_app_country] => US
[patent_app_date] => 2016-08-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 10000
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15236627
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/236627 | Method for detecting a latent failure mode in an electronic selector having an interface switch and at least two underlying switches | Aug 14, 2016 | Issued |
Array
(
[id] => 12027484
[patent_doc_number] => 20170317583
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-11-02
[patent_title] => 'Fast Turn-On Power Switch'
[patent_app_type] => utility
[patent_app_number] => 15/234722
[patent_app_country] => US
[patent_app_date] => 2016-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 7363
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15234722
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/234722 | Fast turn-on power switch | Aug 10, 2016 | Issued |
Array
(
[id] => 13112973
[patent_doc_number] => 10075154
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2018-09-11
[patent_title] => Analog front end circuit of an optical pulse energy digitizer
[patent_app_type] => utility
[patent_app_number] => 15/232798
[patent_app_country] => US
[patent_app_date] => 2016-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 10
[patent_no_of_words] => 5744
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15232798
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/232798 | Analog front end circuit of an optical pulse energy digitizer | Aug 8, 2016 | Issued |
Array
(
[id] => 14981737
[patent_doc_number] => 10444778
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-10-15
[patent_title] => Voltage regulator
[patent_app_type] => utility
[patent_app_number] => 15/232373
[patent_app_country] => US
[patent_app_date] => 2016-08-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4517
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 154
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15232373
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/232373 | Voltage regulator | Aug 8, 2016 | Issued |
Array
(
[id] => 11439969
[patent_doc_number] => 20170040990
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-02-09
[patent_title] => 'MULTIPLEXER CHARGE INJECTION REDUCTION'
[patent_app_type] => utility
[patent_app_number] => 15/231350
[patent_app_country] => US
[patent_app_date] => 2016-08-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 4295
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15231350
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/231350 | Multiplexer charge injection reduction | Aug 7, 2016 | Issued |
Array
(
[id] => 11884433
[patent_doc_number] => 09755623
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-09-05
[patent_title] => 'Multi-bit flip-flop with shared clock switch'
[patent_app_type] => utility
[patent_app_number] => 15/230459
[patent_app_country] => US
[patent_app_date] => 2016-08-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4686
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15230459
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/230459 | Multi-bit flip-flop with shared clock switch | Aug 6, 2016 | Issued |
Array
(
[id] => 12937876
[patent_doc_number] => 09831882
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-11-28
[patent_title] => Fast-response hybrid lock detector
[patent_app_type] => utility
[patent_app_number] => 15/226286
[patent_app_country] => US
[patent_app_date] => 2016-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 5911
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15226286
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/226286 | Fast-response hybrid lock detector | Aug 1, 2016 | Issued |
Array
(
[id] => 12163178
[patent_doc_number] => 20180034444
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-02-01
[patent_title] => 'METHOD AND SYSTEM FOR ATTENUATOR PHASE COMPENSATION'
[patent_app_type] => utility
[patent_app_number] => 15/224933
[patent_app_country] => US
[patent_app_date] => 2016-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 4667
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15224933
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/224933 | Method and system for attenuator phase compensation | Jul 31, 2016 | Issued |
Array
(
[id] => 11933133
[patent_doc_number] => 09800142
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-10-24
[patent_title] => 'Switching element driving circuit'
[patent_app_type] => utility
[patent_app_number] => 15/219339
[patent_app_country] => US
[patent_app_date] => 2016-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 6567
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 331
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15219339
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/219339 | Switching element driving circuit | Jul 25, 2016 | Issued |
Array
(
[id] => 11911813
[patent_doc_number] => 09780644
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2017-10-03
[patent_title] => 'Methods and apparatus for always on domain finite state machine shutdown using a clock source from a power managed domain'
[patent_app_type] => utility
[patent_app_number] => 15/220092
[patent_app_country] => US
[patent_app_date] => 2016-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 6889
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15220092
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/220092 | Methods and apparatus for always on domain finite state machine shutdown using a clock source from a power managed domain | Jul 25, 2016 | Issued |
Array
(
[id] => 12155346
[patent_doc_number] => 20180026610
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2018-01-25
[patent_title] => 'LATCH CIRCUITRY'
[patent_app_type] => utility
[patent_app_number] => 15/215364
[patent_app_country] => US
[patent_app_date] => 2016-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5069
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15215364
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/215364 | Latch circuitry | Jul 19, 2016 | Issued |
Array
(
[id] => 14559535
[patent_doc_number] => 10348243
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2019-07-09
[patent_title] => Switched capacitor circuit structure with method of controlling source-drain resistance across same
[patent_app_type] => utility
[patent_app_number] => 15/213529
[patent_app_country] => US
[patent_app_date] => 2016-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 8
[patent_no_of_words] => 5286
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 156
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15213529
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/213529 | Switched capacitor circuit structure with method of controlling source-drain resistance across same | Jul 18, 2016 | Issued |
Array
(
[id] => 11367663
[patent_doc_number] => 20170005644
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2017-01-05
[patent_title] => 'ALL-OPTICAL PROTERETIC PHOTONIC INTEGRATED DEVICE'
[patent_app_type] => utility
[patent_app_number] => 15/200104
[patent_app_country] => US
[patent_app_date] => 2016-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 4881
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15200104
[rel_patent_id] =>[rel_patent_doc_number] =>) 15/200104 | All-optical proteretic photonic integrated device | Jun 30, 2016 | Issued |
Array
(
[id] => 14350653
[patent_doc_number] => 20190157299
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2019-05-23
[patent_title] => BATTERY MANAGMENT CHIP CIRCUIT ON THE BASE OF SILICON ON INSULATOR (SOI) PROCESS
[patent_app_type] => utility
[patent_app_number] => 16/085423
[patent_app_country] => US
[patent_app_date] => 2016-07-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3310
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 31
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16085423
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/085423 | Battery management chip circuit on the base of silicon on insulator (SOI) process | Jun 30, 2016 | Issued |