Search

Charles E. Phillips

Examiner (ID: 298)

Most Active Art Unit
3751
Art Unit(s)
3751, 3105, 2403
Total Applications
2438
Issued Applications
1788
Pending Applications
61
Abandoned Applications
589

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8669398 [patent_doc_number] => 20130043936 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-21 [patent_title] => 'Method And Apparatus For Controlling Power Supply' [patent_app_type] => utility [patent_app_number] => 13/588811 [patent_app_country] => US [patent_app_date] => 2012-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5816 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13588811 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/588811
Method and apparatus for controlling power supply Aug 16, 2012 Issued
Array ( [id] => 8707033 [patent_doc_number] => 20130064322 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'FREQUENCY-CONTROL CIRCUITS AND SIGNAL GENERATION DEVICES USING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/588525 [patent_app_country] => US [patent_app_date] => 2012-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3920 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13588525 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/588525
Frequency-control circuits and signal generation devices using the same Aug 16, 2012 Issued
Array ( [id] => 11287240 [patent_doc_number] => 09503103 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-22 [patent_title] => 'Phase locked loop with a frequency multiplier and method of configuring the phase locked loop' [patent_app_type] => utility [patent_app_number] => 13/569643 [patent_app_country] => US [patent_app_date] => 2012-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6061 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13569643 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/569643
Phase locked loop with a frequency multiplier and method of configuring the phase locked loop Aug 7, 2012 Issued
Array ( [id] => 9178971 [patent_doc_number] => 20130320956 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-12-05 [patent_title] => 'LEVEL SHIFTER CIRCUIT AND GATE DRIVER CIRCUIT INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/564253 [patent_app_country] => US [patent_app_date] => 2012-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3963 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13564253 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/564253
Level shifter circuit and gate driver circuit including the same Jul 31, 2012 Issued
Array ( [id] => 11891659 [patent_doc_number] => 09762233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-12 [patent_title] => 'System for a contactless control of a field effect transistor' [patent_app_type] => utility [patent_app_number] => 14/238846 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2115 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14238846 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/238846
System for a contactless control of a field effect transistor Jul 30, 2012 Issued
Array ( [id] => 8982879 [patent_doc_number] => 08514000 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-08-20 [patent_title] => 'Meta-hardened flip-flop' [patent_app_type] => utility [patent_app_number] => 13/562539 [patent_app_country] => US [patent_app_date] => 2012-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 3249 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 163 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13562539 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/562539
Meta-hardened flip-flop Jul 30, 2012 Issued
Array ( [id] => 10139235 [patent_doc_number] => 09172563 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-10-27 [patent_title] => 'Integrated combiner with common mode correction' [patent_app_type] => utility [patent_app_number] => 13/560624 [patent_app_country] => US [patent_app_date] => 2012-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2588 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13560624 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/560624
Integrated combiner with common mode correction Jul 26, 2012 Issued
Array ( [id] => 9345862 [patent_doc_number] => 08665013 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-03-04 [patent_title] => 'Monolithic integrated circuit chip integrating multiple devices' [patent_app_type] => utility [patent_app_number] => 13/558255 [patent_app_country] => US [patent_app_date] => 2012-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3084 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13558255 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/558255
Monolithic integrated circuit chip integrating multiple devices Jul 24, 2012 Issued
Array ( [id] => 10319913 [patent_doc_number] => 20150204917 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-07-23 [patent_title] => 'System and method for on-die voltage difference measurement on a pass device, and integrated circuit' [patent_app_type] => utility [patent_app_number] => 14/415151 [patent_app_country] => US [patent_app_date] => 2012-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4650 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14415151 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/415151
System and method for on-die voltage difference measurement on a pass device, and integrated circuit Jul 18, 2012 Issued
Array ( [id] => 8681545 [patent_doc_number] => 20130049829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'VARIABLE DELAY LINE FOR DELAY LOCKED LOOP' [patent_app_type] => utility [patent_app_number] => 13/547743 [patent_app_country] => US [patent_app_date] => 2012-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3822 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13547743 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/547743
Variable delay line for delay locked loop Jul 11, 2012 Issued
Array ( [id] => 9141176 [patent_doc_number] => 08581644 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-11-12 [patent_title] => 'System and method providing bandwidth adjustment in integral path of phase locked loop circuitry' [patent_app_type] => utility [patent_app_number] => 13/543975 [patent_app_country] => US [patent_app_date] => 2012-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 22 [patent_no_of_words] => 11930 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13543975 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/543975
System and method providing bandwidth adjustment in integral path of phase locked loop circuitry Jul 8, 2012 Issued
Array ( [id] => 9000898 [patent_doc_number] => 20130222022 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-29 [patent_title] => 'SYSTEM AND METHOD FOR OSCILLATOR FREQUENCY CONTROL' [patent_app_type] => utility [patent_app_number] => 13/533691 [patent_app_country] => US [patent_app_date] => 2012-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4006 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13533691 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/533691
System and method for oscillator frequency control Jun 25, 2012 Issued
Array ( [id] => 9246209 [patent_doc_number] => 08610494 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-12-17 [patent_title] => 'Low power active filter' [patent_app_type] => utility [patent_app_number] => 13/494263 [patent_app_country] => US [patent_app_date] => 2012-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 2507 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13494263 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/494263
Low power active filter Jun 11, 2012 Issued
Array ( [id] => 9441782 [patent_doc_number] => 08710896 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-29 [patent_title] => 'Sampling switch circuit that uses correlated level shifting' [patent_app_type] => utility [patent_app_number] => 13/484304 [patent_app_country] => US [patent_app_date] => 2012-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5863 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13484304 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/484304
Sampling switch circuit that uses correlated level shifting May 30, 2012 Issued
Array ( [id] => 8604361 [patent_doc_number] => 20130009673 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-10 [patent_title] => 'ADAPTIVE BODY BIAS CIRCUIT AND SEMICONDUCTOR INTEGRATED CIRCUIT INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/484603 [patent_app_country] => US [patent_app_date] => 2012-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9148 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13484603 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/484603
Adaptive body bias circuit and semiconductor integrated circuit including the same May 30, 2012 Issued
Array ( [id] => 10513270 [patent_doc_number] => 09240850 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-19 [patent_title] => 'Exploiting multiple antennas for spectrum sensing in cognitive radio networks' [patent_app_type] => utility [patent_app_number] => 13/485538 [patent_app_country] => US [patent_app_date] => 2012-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13119 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13485538 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/485538
Exploiting multiple antennas for spectrum sensing in cognitive radio networks May 30, 2012 Issued
Array ( [id] => 8762426 [patent_doc_number] => 08422958 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-04-16 [patent_title] => 'Exploiting multiple antennas for spectrum sensing in cognitive radio networks' [patent_app_type] => utility [patent_app_number] => 13/485530 [patent_app_country] => US [patent_app_date] => 2012-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 13104 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13485530 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/485530
Exploiting multiple antennas for spectrum sensing in cognitive radio networks May 30, 2012 Issued
Array ( [id] => 8961330 [patent_doc_number] => 20130200932 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'Delay Lock Loop Circuit and Method' [patent_app_type] => utility [patent_app_number] => 13/481961 [patent_app_country] => US [patent_app_date] => 2012-05-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3097 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13481961 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/481961
Delay lock loop circuit and method May 28, 2012 Issued
Array ( [id] => 9172153 [patent_doc_number] => 20130314138 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-28 [patent_title] => 'STATE RETENTION SUPPLY VOLTAGE DISTRIBUTION USING CLOCK NETWORK SHIELDING' [patent_app_type] => utility [patent_app_number] => 13/480971 [patent_app_country] => US [patent_app_date] => 2012-05-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5095 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13480971 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/480971
State retention supply voltage distribution using clock network shielding May 24, 2012 Issued
Array ( [id] => 10179594 [patent_doc_number] => 09209817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-08 [patent_title] => 'Clock generation circuit, display device drive circuit, and control method of clock generation circuit' [patent_app_type] => utility [patent_app_number] => 13/477654 [patent_app_country] => US [patent_app_date] => 2012-05-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7198 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13477654 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/477654
Clock generation circuit, display device drive circuit, and control method of clock generation circuit May 21, 2012 Issued
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