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Charles Ehne

Examiner (ID: 16121, Phone: (571)272-2471 , Office: P/2113 )

Most Active Art Unit
2113
Art Unit(s)
2113
Total Applications
1151
Issued Applications
1058
Pending Applications
32
Abandoned Applications
77

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9548700 [patent_doc_number] => 20140173348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'FIRMWARE GENERATED REGISTER FILE FOR USE IN HARDWARE VALIDATION' [patent_app_type] => utility [patent_app_number] => 13/793345 [patent_app_country] => US [patent_app_date] => 2013-03-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6353 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13793345 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/793345
Firmware generated register file for use in hardware validation Mar 10, 2013 Issued
Array ( [id] => 9999024 [patent_doc_number] => 09043641 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Reconfigurable recovery modes in high availability processors' [patent_app_type] => utility [patent_app_number] => 13/785103 [patent_app_country] => US [patent_app_date] => 2013-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4359 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13785103 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/785103
Reconfigurable recovery modes in high availability processors Mar 4, 2013 Issued
Array ( [id] => 11931609 [patent_doc_number] => 09798608 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-10-24 [patent_title] => 'Recovery program using diagnostic results' [patent_app_type] => utility [patent_app_number] => 14/764937 [patent_app_country] => US [patent_app_date] => 2013-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6224 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14764937 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/764937
Recovery program using diagnostic results Feb 27, 2013 Issued
Array ( [id] => 11752327 [patent_doc_number] => 09710340 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-18 [patent_title] => 'Replacement of a corrupt driver variable record' [patent_app_type] => utility [patent_app_number] => 14/764769 [patent_app_country] => US [patent_app_date] => 2013-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3170 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14764769 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/764769
Replacement of a corrupt driver variable record Jan 30, 2013 Issued
Array ( [id] => 8971802 [patent_doc_number] => 08510632 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-08-13 [patent_title] => 'Control method for a semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 13/740724 [patent_app_country] => US [patent_app_date] => 2013-01-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 10558 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13740724 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/740724
Control method for a semiconductor memory device Jan 13, 2013 Issued
Array ( [id] => 11686507 [patent_doc_number] => 09684554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-20 [patent_title] => 'System and method for using failure casting to manage failures in a computed system' [patent_app_type] => utility [patent_app_number] => 13/739251 [patent_app_country] => US [patent_app_date] => 2013-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 15211 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13739251 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/739251
System and method for using failure casting to manage failures in a computed system Jan 10, 2013 Issued
Array ( [id] => 11686507 [patent_doc_number] => 09684554 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-20 [patent_title] => 'System and method for using failure casting to manage failures in a computed system' [patent_app_type] => utility [patent_app_number] => 13/739251 [patent_app_country] => US [patent_app_date] => 2013-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 15211 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 30 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13739251 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/739251
System and method for using failure casting to manage failures in a computed system Jan 10, 2013 Issued
Array ( [id] => 8991942 [patent_doc_number] => 20130219223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-22 [patent_title] => 'Method for Metric Ranking in Invariant Networks of Distributed Systems' [patent_app_type] => utility [patent_app_number] => 13/738004 [patent_app_country] => US [patent_app_date] => 2013-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2192 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13738004 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/738004
Method for metric ranking in invariant networks of distributed systems Jan 9, 2013 Issued
Array ( [id] => 9599178 [patent_doc_number] => 20140195859 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-10 [patent_title] => 'Automated Testing of Hot Swap Scenarios of Field Replaceable Units in a Storage System' [patent_app_type] => utility [patent_app_number] => 13/736491 [patent_app_country] => US [patent_app_date] => 2013-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5137 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13736491 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/736491
Automated testing of hot swap scenarios of field replaceable units in a storage system Jan 7, 2013 Issued
Array ( [id] => 10157571 [patent_doc_number] => 09189350 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-17 [patent_title] => 'Disk array control apparatus, disk array apparatus, and disk array control method' [patent_app_type] => utility [patent_app_number] => 13/733237 [patent_app_country] => US [patent_app_date] => 2013-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5922 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13733237 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/733237
Disk array control apparatus, disk array apparatus, and disk array control method Jan 2, 2013 Issued
Array ( [id] => 9571713 [patent_doc_number] => 20140189426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'APPARATUS AND METHOD FOR FAST FAILURE HANDLING OF INSTRUCTIONS' [patent_app_type] => utility [patent_app_number] => 13/729931 [patent_app_country] => US [patent_app_date] => 2012-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 18919 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13729931 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/729931
Apparatus and method for fast failure handling of instructions Dec 27, 2012 Issued
Array ( [id] => 10003097 [patent_doc_number] => 09047192 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-02 [patent_title] => 'Signature-based store checking buffer' [patent_app_type] => utility [patent_app_number] => 13/724987 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5864 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724987 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/724987
Signature-based store checking buffer Dec 20, 2012 Issued
Array ( [id] => 10021435 [patent_doc_number] => 09063922 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-06-23 [patent_title] => 'Firmware generated register file for use in hardware validation' [patent_app_type] => utility [patent_app_number] => 13/718455 [patent_app_country] => US [patent_app_date] => 2012-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6314 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13718455 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/718455
Firmware generated register file for use in hardware validation Dec 17, 2012 Issued
Array ( [id] => 8782001 [patent_doc_number] => 20130103976 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-25 [patent_title] => 'FAILURE RECORVERY METHOD' [patent_app_type] => utility [patent_app_number] => 13/710723 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 7518 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13710723 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/710723
Failure recovery method Dec 10, 2012 Issued
Array ( [id] => 9999037 [patent_doc_number] => 09043654 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Avoiding processing flaws in a computer processor triggered by a predetermined sequence of hardware events' [patent_app_type] => utility [patent_app_number] => 13/708881 [patent_app_country] => US [patent_app_date] => 2012-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3231 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13708881 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/708881
Avoiding processing flaws in a computer processor triggered by a predetermined sequence of hardware events Dec 6, 2012 Issued
Array ( [id] => 9520564 [patent_doc_number] => 20140157055 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'MEMORY SUBSYSTEM COMMAND BUS STRESS TESTING' [patent_app_type] => utility [patent_app_number] => 13/706196 [patent_app_country] => US [patent_app_date] => 2012-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 17646 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13706196 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/706196
Memory subsystem command bus stress testing Dec 4, 2012 Issued
Array ( [id] => 9517133 [patent_doc_number] => 20140153626 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'Automated Line Test Action and Monitoring System' [patent_app_type] => utility [patent_app_number] => 13/705791 [patent_app_country] => US [patent_app_date] => 2012-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 10760 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13705791 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/705791
Automated line test action and monitoring system Dec 4, 2012 Issued
Array ( [id] => 9967887 [patent_doc_number] => 09015522 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-04-21 [patent_title] => 'Implementing DRAM failure scenarios mitigation by using buffer techniques delaying usage of RAS features in computer systems' [patent_app_type] => utility [patent_app_number] => 13/693353 [patent_app_country] => US [patent_app_date] => 2012-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3152 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13693353 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/693353
Implementing DRAM failure scenarios mitigation by using buffer techniques delaying usage of RAS features in computer systems Dec 3, 2012 Issued
Array ( [id] => 11700729 [patent_doc_number] => 09690645 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-27 [patent_title] => 'Determining suspected root causes of anomalous network behavior' [patent_app_type] => utility [patent_app_number] => 14/649183 [patent_app_country] => US [patent_app_date] => 2012-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 4768 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14649183 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/649183
Determining suspected root causes of anomalous network behavior Dec 3, 2012 Issued
Array ( [id] => 8979001 [patent_doc_number] => 20130212431 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-15 [patent_title] => 'METHOD AND SYSTEM FOR PROVIDING A SMART MEMORY ARCHITECTURE' [patent_app_type] => utility [patent_app_number] => 13/691639 [patent_app_country] => US [patent_app_date] => 2012-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 15422 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13691639 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/691639
Method and system for providing a smart memory architecture Nov 29, 2012 Issued
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