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Supervisory Patent Examiner (ID: 12898, Phone: (571)272-3721 , Office: P/2193 )

Most Active Art Unit
2193
Art Unit(s)
2124, 2193
Total Applications
586
Issued Applications
324
Pending Applications
35
Abandoned Applications
227

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 580039 [patent_doc_number] => 07472149 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-30 [patent_title] => 'Arithmetic unit for approximating function' [patent_app_type] => utility [patent_app_number] => 10/924981 [patent_app_country] => US [patent_app_date] => 2004-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10831 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 278 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/472/07472149.pdf [firstpage_image] =>[orig_patent_app_number] => 10924981 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/924981
Arithmetic unit for approximating function Aug 24, 2004 Issued
Array ( [id] => 5592156 [patent_doc_number] => 20060041609 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-02-23 [patent_title] => 'System and method for multi-dimensional lookup table interpolation' [patent_app_type] => utility [patent_app_number] => 10/923382 [patent_app_country] => US [patent_app_date] => 2004-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4535 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0041/20060041609.pdf [firstpage_image] =>[orig_patent_app_number] => 10923382 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/923382
System and method for multi-dimensional lookup table interpolation Aug 19, 2004 Abandoned
Array ( [id] => 4703661 [patent_doc_number] => 20080063184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-03-13 [patent_title] => 'Method of Performing a Modular Multiplication and Method of Performing a Euclidean Multiplication Using Numbers with 2N Bits' [patent_app_type] => utility [patent_app_number] => 10/568749 [patent_app_country] => US [patent_app_date] => 2004-08-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5613 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0063/20080063184.pdf [firstpage_image] =>[orig_patent_app_number] => 10568749 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/568749
Method of Performing a Modular Multiplication and Method of Performing a Euclidean Multiplication Using Numbers with 2N Bits Aug 19, 2004 Abandoned
Array ( [id] => 7212646 [patent_doc_number] => 20050044121 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-02-24 [patent_title] => 'Multipath distortion eliminating filter' [patent_app_type] => utility [patent_app_number] => 10/920293 [patent_app_country] => US [patent_app_date] => 2004-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4512 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20050044121.pdf [firstpage_image] =>[orig_patent_app_number] => 10920293 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/920293
Multipath distortion eliminating filter Aug 17, 2004 Abandoned
Array ( [id] => 7106788 [patent_doc_number] => 20050108308 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-05-19 [patent_title] => 'Random number generating circuit, semiconductor integrated circuit, IC card and information terminal device' [patent_app_type] => utility [patent_app_number] => 10/919291 [patent_app_country] => US [patent_app_date] => 2004-08-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 5590 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0108/20050108308.pdf [firstpage_image] =>[orig_patent_app_number] => 10919291 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/919291
Random number generating circuit, semiconductor integrated circuit, IC card and information terminal device Aug 16, 2004 Issued
Array ( [id] => 7091574 [patent_doc_number] => 20050010628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-13 [patent_title] => 'In-place memory management for FFT' [patent_app_type] => utility [patent_app_number] => 10/911524 [patent_app_country] => US [patent_app_date] => 2004-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2737 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20050010628.pdf [firstpage_image] =>[orig_patent_app_number] => 10911524 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/911524
In-place memory management for FFT Aug 4, 2004 Abandoned
Array ( [id] => 580030 [patent_doc_number] => 07472148 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-12-30 [patent_title] => 'Method and apparatus for random-number generator' [patent_app_type] => utility [patent_app_number] => 10/897589 [patent_app_country] => US [patent_app_date] => 2004-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2222 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/472/07472148.pdf [firstpage_image] =>[orig_patent_app_number] => 10897589 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/897589
Method and apparatus for random-number generator Jul 22, 2004 Issued
Array ( [id] => 4589008 [patent_doc_number] => 07831651 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-11-09 [patent_title] => 'Method and apparatus for modular inversion for information security and recording medium with a program for implementing the method' [patent_app_type] => utility [patent_app_number] => 10/893899 [patent_app_country] => US [patent_app_date] => 2004-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 30 [patent_no_of_words] => 20211 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/831/07831651.pdf [firstpage_image] =>[orig_patent_app_number] => 10893899 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/893899
Method and apparatus for modular inversion for information security and recording medium with a program for implementing the method Jul 19, 2004 Issued
Array ( [id] => 5739792 [patent_doc_number] => 20060010183 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-12 [patent_title] => 'Random number generation' [patent_app_type] => utility [patent_app_number] => 10/887713 [patent_app_country] => US [patent_app_date] => 2004-07-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5883 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0010/20060010183.pdf [firstpage_image] =>[orig_patent_app_number] => 10887713 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/887713
Random number generation Jul 8, 2004 Abandoned
Array ( [id] => 5896364 [patent_doc_number] => 20060004903 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-05 [patent_title] => 'CSA tree constellation' [patent_app_type] => utility [patent_app_number] => 10/879529 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7607 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20060004903.pdf [firstpage_image] =>[orig_patent_app_number] => 10879529 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/879529
CSA tree constellation Jun 29, 2004 Abandoned
Array ( [id] => 5896363 [patent_doc_number] => 20060004902 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-01-05 [patent_title] => 'Reconfigurable circuit with programmable split adder' [patent_app_type] => utility [patent_app_number] => 10/881334 [patent_app_country] => US [patent_app_date] => 2004-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5489 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20060004902.pdf [firstpage_image] =>[orig_patent_app_number] => 10881334 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/881334
Reconfigurable circuit with programmable split adder Jun 29, 2004 Abandoned
Array ( [id] => 6979486 [patent_doc_number] => 20050289204 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-12-29 [patent_title] => 'Parallel feedback processing' [patent_app_type] => utility [patent_app_number] => 10/880052 [patent_app_country] => US [patent_app_date] => 2004-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5785 [patent_no_of_claims] => 45 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0289/20050289204.pdf [firstpage_image] =>[orig_patent_app_number] => 10880052 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/880052
Parallel feedback processing Jun 28, 2004 Abandoned
Array ( [id] => 5633330 [patent_doc_number] => 20060149801 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2006-07-06 [patent_title] => 'Method of encoding a signal into a bit stream' [patent_app_type] => utility [patent_app_number] => 10/562358 [patent_app_country] => US [patent_app_date] => 2004-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5001 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0149/20060149801.pdf [firstpage_image] =>[orig_patent_app_number] => 10562358 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/562358
Method of encoding a signal into a bit stream Jun 27, 2004 Abandoned
Array ( [id] => 796651 [patent_doc_number] => 07430574 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-30 [patent_title] => 'Efficient execution and emulation of bit scan operations' [patent_app_type] => utility [patent_app_number] => 10/877931 [patent_app_country] => US [patent_app_date] => 2004-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 4747 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/430/07430574.pdf [firstpage_image] =>[orig_patent_app_number] => 10877931 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/877931
Efficient execution and emulation of bit scan operations Jun 23, 2004 Issued
Array ( [id] => 7029552 [patent_doc_number] => 20050021577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-01-27 [patent_title] => 'Applied estimation of eigenvectors and eigenvalues' [patent_app_type] => utility [patent_app_number] => 10/855174 [patent_app_country] => US [patent_app_date] => 2004-05-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 9339 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0021/20050021577.pdf [firstpage_image] =>[orig_patent_app_number] => 10855174 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/855174
Applied estimation of eigenvectors and eigenvalues May 26, 2004 Abandoned
Array ( [id] => 7043779 [patent_doc_number] => 20050248374 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-11-10 [patent_title] => 'Method and apparatus for improving the frequency resolution of a direct digital synthesizer' [patent_app_type] => utility [patent_app_number] => 10/842746 [patent_app_country] => US [patent_app_date] => 2004-05-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 7076 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0248/20050248374.pdf [firstpage_image] =>[orig_patent_app_number] => 10842746 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/842746
Method and apparatus for improving the frequency resolution of a direct digital synthesizer May 9, 2004 Issued
Array ( [id] => 5086843 [patent_doc_number] => 20070276894 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-11-29 [patent_title] => 'Process And Device For Determining A Transforming Element For A Given Transformation Function, Method And Device For Transforming A Digital Signal From The Time Domain Into The Frequency Domain And Vice Versa And Computer Readable Medium' [patent_app_type] => utility [patent_app_number] => 10/573955 [patent_app_country] => US [patent_app_date] => 2004-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 9544 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0276/20070276894.pdf [firstpage_image] =>[orig_patent_app_number] => 10573955 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/573955
Process And Device For Determining A Transforming Element For A Given Transformation Function, Method And Device For Transforming A Digital Signal From The Time Domain Into The Frequency Domain And Vice Versa And Computer Readable Medium May 5, 2004 Abandoned
Array ( [id] => 283634 [patent_doc_number] => 07555510 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-06-30 [patent_title] => 'Scalable system for inverse discrete cosine transform and method thereof' [patent_app_type] => utility [patent_app_number] => 10/838247 [patent_app_country] => US [patent_app_date] => 2004-05-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8908 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 185 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/555/07555510.pdf [firstpage_image] =>[orig_patent_app_number] => 10838247 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/838247
Scalable system for inverse discrete cosine transform and method thereof May 4, 2004 Issued
Array ( [id] => 6927389 [patent_doc_number] => 20050240646 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2005-10-27 [patent_title] => 'Reconfigurable matrix multiplier architecture and extended borrow parallel counter and small-multiplier circuits' [patent_app_type] => utility [patent_app_number] => 10/830766 [patent_app_country] => US [patent_app_date] => 2004-04-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 12647 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0240/20050240646.pdf [firstpage_image] =>[orig_patent_app_number] => 10830766 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/830766
Reconfigurable matrix multiplier architecture and extended borrow parallel counter and small-multiplier circuits Apr 22, 2004 Abandoned
Array ( [id] => 4606237 [patent_doc_number] => 07987222 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2011-07-26 [patent_title] => 'Method and apparatus for implementing a multiplier utilizing digital signal processor block memory extension' [patent_app_type] => utility [patent_app_number] => 10/829559 [patent_app_country] => US [patent_app_date] => 2004-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5948 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/987/07987222.pdf [firstpage_image] =>[orig_patent_app_number] => 10829559 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/829559
Method and apparatus for implementing a multiplier utilizing digital signal processor block memory extension Apr 21, 2004 Issued
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