Search

Chia-yi Liu

Examiner (ID: 6898, Phone: (571)270-1573 , Office: P/3695 )

Most Active Art Unit
3695
Art Unit(s)
3696, 3695, 3692
Total Applications
371
Issued Applications
94
Pending Applications
34
Abandoned Applications
245

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 2974122 [patent_doc_number] => 05225378 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-07-06 [patent_title] => 'Method of forming a phosphorus doped silicon film' [patent_app_type] => 1 [patent_app_number] => 7/775618 [patent_app_country] => US [patent_app_date] => 1991-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3340 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/225/05225378.pdf [firstpage_image] =>[orig_patent_app_number] => 775618 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/775618
Method of forming a phosphorus doped silicon film Oct 14, 1991 Issued
Array ( [id] => 2941146 [patent_doc_number] => 05223457 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-06-29 [patent_title] => 'High-frequency semiconductor wafer processing method using a negative self-bias' [patent_app_type] => 1 [patent_app_number] => 7/774127 [patent_app_country] => US [patent_app_date] => 1991-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4401 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/223/05223457.pdf [firstpage_image] =>[orig_patent_app_number] => 774127 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/774127
High-frequency semiconductor wafer processing method using a negative self-bias Oct 10, 1991 Issued
Array ( [id] => 2824799 [patent_doc_number] => 05116784 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-05-26 [patent_title] => 'Method of forming semiconductor film' [patent_app_type] => 1 [patent_app_number] => 7/773430 [patent_app_country] => US [patent_app_date] => 1991-10-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3376 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/116/05116784.pdf [firstpage_image] =>[orig_patent_app_number] => 773430 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/773430
Method of forming semiconductor film Oct 8, 1991 Issued
Array ( [id] => 2946329 [patent_doc_number] => 05180686 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-19 [patent_title] => 'Method for continuously deposting a transparent oxide material by chemical pyrolysis' [patent_app_type] => 1 [patent_app_number] => 7/770734 [patent_app_country] => US [patent_app_date] => 1991-10-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 6830 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 108 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/180/05180686.pdf [firstpage_image] =>[orig_patent_app_number] => 770734 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/770734
Method for continuously deposting a transparent oxide material by chemical pyrolysis Sep 30, 1991 Issued
Array ( [id] => 3098337 [patent_doc_number] => 05314848 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-05-24 [patent_title] => 'Method for manufacturing a semiconductor device using a heat treatment according to a temperature profile that prevents grain or particle precipitation during reflow' [patent_app_type] => 1 [patent_app_number] => 7/764846 [patent_app_country] => US [patent_app_date] => 1991-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 32 [patent_no_of_words] => 6140 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 25 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/314/05314848.pdf [firstpage_image] =>[orig_patent_app_number] => 764846 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/764846
Method for manufacturing a semiconductor device using a heat treatment according to a temperature profile that prevents grain or particle precipitation during reflow Sep 23, 1991 Issued
Array ( [id] => 2985520 [patent_doc_number] => 05266527 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-11-30 [patent_title] => 'Conformal wafer chuck for plasma processing having a non-planar surface' [patent_app_type] => 1 [patent_app_number] => 7/761202 [patent_app_country] => US [patent_app_date] => 1991-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 2862 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/266/05266527.pdf [firstpage_image] =>[orig_patent_app_number] => 761202 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/761202
Conformal wafer chuck for plasma processing having a non-planar surface Sep 16, 1991 Issued
Array ( [id] => 2894730 [patent_doc_number] => 05183777 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-02-02 [patent_title] => 'Method of forming shallow junctions' [patent_app_type] => 1 [patent_app_number] => 7/759767 [patent_app_country] => US [patent_app_date] => 1991-09-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 24 [patent_no_of_words] => 4459 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/183/05183777.pdf [firstpage_image] =>[orig_patent_app_number] => 759767 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/759767
Method of forming shallow junctions Sep 12, 1991 Issued
07/759376 TEMPERATURE CONTROLLED PROCESS FOR EPITAXIAL GROWTH OF A FILM OF MATERIAL Sep 12, 1991 Abandoned
Array ( [id] => 2887419 [patent_doc_number] => 05238866 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-08-24 [patent_title] => 'Plasma enhanced chemical vapor deposition process for producing an amorphous semiconductive surface coating' [patent_app_type] => 1 [patent_app_number] => 7/756568 [patent_app_country] => US [patent_app_date] => 1991-09-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 8 [patent_no_of_words] => 2757 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/238/05238866.pdf [firstpage_image] =>[orig_patent_app_number] => 756568 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/756568
Plasma enhanced chemical vapor deposition process for producing an amorphous semiconductive surface coating Sep 10, 1991 Issued
Array ( [id] => 2814358 [patent_doc_number] => 05122481 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1992-06-16 [patent_title] => 'Semiconductor element manufacturing process using sequential grinding and chemical etching steps' [patent_app_type] => 1 [patent_app_number] => 7/754906 [patent_app_country] => US [patent_app_date] => 1991-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2286 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/122/05122481.pdf [firstpage_image] =>[orig_patent_app_number] => 754906 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/754906
Semiconductor element manufacturing process using sequential grinding and chemical etching steps Sep 3, 1991 Issued
07/751441 IGBT PROCESS TO PRODUCE PLATINUM LIFETIME CONTROL Aug 27, 1991 Abandoned
07/748376 REMOVAL OF SUBSTRATE PERIMETER MATERIAL Aug 21, 1991 Abandoned
Array ( [id] => 2986240 [patent_doc_number] => 05212118 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-05-18 [patent_title] => 'Method for selective chemical vapor deposition of dielectric, semiconductor and conductive films on semiconductor and metallic substrates' [patent_app_type] => 1 [patent_app_number] => 7/743546 [patent_app_country] => US [patent_app_date] => 1991-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 3379 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/212/05212118.pdf [firstpage_image] =>[orig_patent_app_number] => 743546 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/743546
Method for selective chemical vapor deposition of dielectric, semiconductor and conductive films on semiconductor and metallic substrates Aug 8, 1991 Issued
07/742256 MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE Aug 7, 1991 Abandoned
Array ( [id] => 2982604 [patent_doc_number] => 05250473 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-10-05 [patent_title] => 'Method of providing silicon dioxide layer on a substrate by means of chemical reaction from the vapor phase at a low pressure (LPCVD)' [patent_app_type] => 1 [patent_app_number] => 7/739624 [patent_app_country] => US [patent_app_date] => 1991-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2339 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/250/05250473.pdf [firstpage_image] =>[orig_patent_app_number] => 739624 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/739624
Method of providing silicon dioxide layer on a substrate by means of chemical reaction from the vapor phase at a low pressure (LPCVD) Aug 1, 1991 Issued
Array ( [id] => 2974141 [patent_doc_number] => 05182234 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-01-26 [patent_title] => 'Profile tailored trench etch using a SF.sub.6 -O.sub.2 etching composition wherein both isotropic and anisotropic etching is achieved by varying the amount of oxygen' [patent_app_type] => 1 [patent_app_number] => 7/737560 [patent_app_country] => US [patent_app_date] => 1991-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 40 [patent_no_of_words] => 7349 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/182/05182234.pdf [firstpage_image] =>[orig_patent_app_number] => 737560 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/737560
Profile tailored trench etch using a SF.sub.6 -O.sub.2 etching composition wherein both isotropic and anisotropic etching is achieved by varying the amount of oxygen Jul 25, 1991 Issued
07/734027 METHOD FOR COOLING SEMICONDUCTOR WAFERS USING A PORTION OF THE FLUORINATED HYDROCARBON COMPONENT OF THE PROCESS GAS Jul 21, 1991 Abandoned
07/730674 DIELECTRIC DEPOSITION AND CLEANING PROCESS FOR IMPROVED GAP FILLING AND DEVICE PLANARIZATION Jul 15, 1991 Abandoned
Array ( [id] => 2933848 [patent_doc_number] => 05246887 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1993-09-21 [patent_title] => 'Dielectric deposition' [patent_app_type] => 1 [patent_app_number] => 7/727698 [patent_app_country] => US [patent_app_date] => 1991-07-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 1 [patent_no_of_words] => 1775 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/246/05246887.pdf [firstpage_image] =>[orig_patent_app_number] => 727698 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/727698
Dielectric deposition Jul 9, 1991 Issued
Array ( [id] => 3049872 [patent_doc_number] => 05306671 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-04-26 [patent_title] => 'Method of treating semiconductor substrate surface and method of manufacturing semiconductor device including such treating method' [patent_app_type] => 1 [patent_app_number] => 7/718674 [patent_app_country] => US [patent_app_date] => 1991-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 37 [patent_no_of_words] => 3699 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/306/05306671.pdf [firstpage_image] =>[orig_patent_app_number] => 718674 [rel_patent_id] =>[rel_patent_doc_number] =>)
07/718674
Method of treating semiconductor substrate surface and method of manufacturing semiconductor device including such treating method Jun 20, 1991 Issued
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